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author | Paul Kocialkowski <paul.kocialkowski@bootlin.com> | 2019-03-14 13:36:16 +0300 |
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committer | Jagan Teki <jagan@amarulasolutions.com> | 2019-04-10 13:04:32 +0300 |
commit | 9d0f9e837421c3e6d1e99caed401511d886a1c36 (patch) | |
tree | de46961e6da73cb988a885d495d211fbf45d1546 /configs/libretech_all_h3_cc_h3_defconfig | |
parent | 882b71e47df2889c77105ddcfe34cbafa762a208 (diff) | |
download | u-boot-9d0f9e837421c3e6d1e99caed401511d886a1c36.tar.xz |
arm: sunxi: Enable DRAM ODT by default on H3/H5
Most of the boards we support with H3/H5 enable DRAM on-die termination,
which is consistent with the high DRAM clocks that are used.
Make it the default (like it's done for other similar platforms) instead
of defining it in each defconfig.
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Diffstat (limited to 'configs/libretech_all_h3_cc_h3_defconfig')
-rw-r--r-- | configs/libretech_all_h3_cc_h3_defconfig | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/configs/libretech_all_h3_cc_h3_defconfig b/configs/libretech_all_h3_cc_h3_defconfig index e2ebc7527f..c00ab01fdd 100644 --- a/configs/libretech_all_h3_cc_h3_defconfig +++ b/configs/libretech_all_h3_cc_h3_defconfig @@ -3,7 +3,6 @@ CONFIG_ARCH_SUNXI=y CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 -CONFIG_DRAM_ODT_EN=y CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set |