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| author | Tom Rini <trini@konsulko.com> | 2020-03-02 17:20:12 +0300 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2020-03-02 17:20:12 +0300 |
| commit | bd7bb38699412bf95449bf9f23aa625c0436eae6 (patch) | |
| tree | 4e30bec98504a3923d40df2594b48c173032e192 /configs | |
| parent | 5045289820835ce0baf5d7cea86f9fdc6170d189 (diff) | |
| parent | 25974079750c5fbf920a226a26d8cb9b1aff2544 (diff) | |
| download | u-boot-bd7bb38699412bf95449bf9f23aa625c0436eae6.tar.xz | |
Merge tag 'xilinx-for-v2020.04-rc4' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx fixes for v2020.04-rc4
- Fix link good bit handling in dp83867
- Rename generic Zynq defconfig
- Fix zybo z7 low leve setup
- Fix error path in zynq_gem driver and fix 64bit usage
- Fix invalid clock name quieries for Versal
- Fix zynq/zynqmp SPL low level configuration via DT selection
Diffstat (limited to 'configs')
| -rw-r--r-- | configs/xilinx_zynq_virt_defconfig (renamed from configs/zynq_virt_defconfig) | 0 | ||||
| -rw-r--r-- | configs/zynq_zybo_z7_defconfig | 2 |
2 files changed, 1 insertions, 1 deletions
diff --git a/configs/zynq_virt_defconfig b/configs/xilinx_zynq_virt_defconfig index ece619f239..ece619f239 100644 --- a/configs/zynq_virt_defconfig +++ b/configs/xilinx_zynq_virt_defconfig diff --git a/configs/zynq_zybo_z7_defconfig b/configs/zynq_zybo_z7_defconfig index 12e1367e97..1dee757062 100644 --- a/configs/zynq_zybo_z7_defconfig +++ b/configs/zynq_zybo_z7_defconfig @@ -6,7 +6,7 @@ CONFIG_DM_GPIO=y CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xe0001000 -CONFIG_DEBUG_UART_CLOCK=50000000 +CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_CUSTOM_LDSCRIPT=y |