diff options
author | Wei Liang Lim <weiliang.lim@starfivetech.com> | 2021-10-07 11:15:08 +0300 |
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committer | Wei Liang Lim <weiliang.lim@starfivetech.com> | 2023-10-18 09:13:01 +0300 |
commit | 6c2c53708d7cb3b3440a1b2c5ab020a322fb64c0 (patch) | |
tree | b52f0700ff999f198cd0952a3c28ebbbcf7faaad /configs | |
parent | d6920e1532354b34310958e767e5484d857267eb (diff) | |
download | u-boot-6c2c53708d7cb3b3440a1b2c5ab020a322fb64c0.tar.xz |
Enabling Dubhe FPGA secure boot
Diffstat (limited to 'configs')
-rw-r--r-- | configs/starfive_dubhe_fpga_secure_defconfig | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/configs/starfive_dubhe_fpga_secure_defconfig b/configs/starfive_dubhe_fpga_secure_defconfig new file mode 100644 index 0000000000..8a3a2aaa64 --- /dev/null +++ b/configs/starfive_dubhe_fpga_secure_defconfig @@ -0,0 +1,47 @@ +CONFIG_RISCV=y +CONFIG_SYS_MALLOC_F_LEN=0x3000 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="dubhe_fpga_secure" +CONFIG_SPL=y +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI_SUPPORT=y +CONFIG_TARGET_STARFIVE_DUBHE_FPGA=y +CONFIG_ARCH_RV64I=y +CONFIG_RISCV_SMODE=y +# CONFIG_SPL_SMP is not set +CONFIG_FIT=y +CONFIG_USE_BOOTARGS=y +CONFIG_BOOTARGS="console=ttySIF0,115200 earlycon=sbi root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="echo Dubhe FPGA booting from serial flash...; sf probe 1:0; sf read 0x84000000 0x400000 0x1200000; bootm 0x84000000" +CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SPL_DM_SPI_FLASH=y +CONFIG_SPL_SPI_LOAD=y +CONFIG_SYS_SPI_U_BOOT_OFFS=0x22000 +CONFIG_CMD_MTD=y +CONFIG_CMD_MTDPARTS=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SPL_CLK=y +CONFIG_DM_MTD=y +CONFIG_SF_DEFAULT_BUS=1 +CONFIG_SF_DEFAULT_SPEED=20000000 +CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_FLASH_ISSI=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_FLASH_MTD=y +CONFIG_RAM=y +CONFIG_SPL_RAM=y +CONFIG_SPI=y +CONFIG_SPI_SIFIVE=y +CONFIG_FIT_SIGNATURE=y +CONFIG_SPL_FIT=y +CONFIG_SPL_FIT_PRINT=y +CONFIG_SPL_FIT_SIGNATURE=y +CONFIG_RSA=y +CONFIG_SPL_RSA=y +CONFIG_SHA256=y
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