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| author | Patrice Chotard <patrice.chotard@foss.st.com> | 2022-04-27 14:54:00 +0300 |
|---|---|---|
| committer | Patrice Chotard <patrice.chotard@foss.st.com> | 2022-05-10 14:56:12 +0300 |
| commit | eda7b6a632bac9d150387080cc2ad6f9970bb311 (patch) | |
| tree | 21c27b4be57696483c86b413b8bb728fc50c6dbb /configs | |
| parent | e9881a1e750025a6614efa8428b6b4e393b55c8f (diff) | |
| download | u-boot-eda7b6a632bac9d150387080cc2ad6f9970bb311.tar.xz | |
configs: stm32746g-eval: Add stm32746g-eval_spl_defconfig
Add stm32746g-eval_spl_defconfig for stm32746g evaluation board to
build SPL.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Diffstat (limited to 'configs')
| -rw-r--r-- | configs/stm32746g-eval_spl_defconfig | 86 |
1 files changed, 86 insertions, 0 deletions
diff --git a/configs/stm32746g-eval_spl_defconfig b/configs/stm32746g-eval_spl_defconfig new file mode 100644 index 0000000000..169a9c5b23 --- /dev/null +++ b/configs/stm32746g-eval_spl_defconfig @@ -0,0 +1,86 @@ +CONFIG_ARM=y +CONFIG_ARCH_STM32=y +CONFIG_SYS_TEXT_BASE=0x08008000 +CONFIG_SYS_MALLOC_LEN=0x100000 +CONFIG_SYS_MALLOC_F_LEN=0xE00 +CONFIG_SPL_GPIO=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_SIZE=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="stm32746g-eval" +CONFIG_SPL_TEXT_BASE=0x8000000 +CONFIG_SPL_SERIAL=y +CONFIG_SPL_DRIVERS_MISC=y +CONFIG_STM32F7=y +CONFIG_TARGET_STM32F746_DISCO=y +CONFIG_SPL=y +CONFIG_BUILD_TARGET="u-boot-with-spl.bin" +CONFIG_DISTRO_DEFAULTS=y +CONFIG_SYS_LOAD_ADDR=0x8008000 +CONFIG_BOOTDELAY=3 +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n" +CONFIG_AUTOBOOT_STOP_STR=" " +CONFIG_USE_BOOTARGS=y +CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel" +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_BOARD_LATE_INIT=y +CONFIG_SPL_BOARD_INIT=y +CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SPL_MTD_SUPPORT=y +CONFIG_SPL_XIP_SUPPORT=y +CONFIG_SPL_DM_RESET=y +CONFIG_SYS_PROMPT="U-Boot > " +CONFIG_CMD_GPT=y +# CONFIG_RANDOM_UUID is not set +CONFIG_CMD_MMC=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_SNTP=y +CONFIG_CMD_DNS=y +CONFIG_CMD_LINK_LOCAL=y +CONFIG_CMD_BMP=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_TIMER=y +# CONFIG_ISO_PARTITION is not set +CONFIG_OF_CONTROL=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_NETCONSOLE=y +CONFIG_SPL_DM=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_SPL_OF_TRANSLATE=y +CONFIG_SPL_CLK=y +CONFIG_ARM_PL180_MMCI=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_STM32_FLASH=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_PHY_SMSC=y +CONFIG_DM_ETH=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y +# CONFIG_PINCTRL_FULL is not set +CONFIG_SPL_PINCTRL=y +CONFIG_SPL_RAM=y +CONFIG_SPECIFY_CONSOLE_INDEX=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_STM32_QSPI=y +CONFIG_SPL_TIMER=y +CONFIG_DM_VIDEO=y +CONFIG_BACKLIGHT_GPIO=y +CONFIG_VIDEO_STM32=y +CONFIG_VIDEO_STM32_MAX_XRES=480 +CONFIG_VIDEO_STM32_MAX_YRES=640 +CONFIG_SPLASH_SCREEN=y +CONFIG_SPLASH_SCREEN_ALIGN=y +CONFIG_VIDEO_BMP_RLE8=y +CONFIG_BMP_16BPP=y +CONFIG_BMP_24BPP=y +CONFIG_BMP_32BPP=y +CONFIG_OF_LIBFDT_OVERLAY=y |