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author | TsiChung Liew <tsicliew@gmail.com> | 2010-03-11 03:24:07 +0300 |
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committer | TsiChung Liew <tsicliew@gmail.com> | 2010-03-24 19:09:20 +0300 |
commit | 9e8e927023582231b034e199568e49f84ac032a9 (patch) | |
tree | 1e7db711a12e8da2598386571d8024379dc2299f /cpu | |
parent | f9d877a6479878ca96688671f37d87b620c3e77c (diff) | |
download | u-boot-9e8e927023582231b034e199568e49f84ac032a9.tar.xz |
ColdFire: Misc update for M53017
Reside Ethernet buffer descriptors in SRAM instead of DRAM. Add
CONFIG_SYS_TX_ETH_BUFFER in platform configuration file. Update
DRAM control and SRAM control register setting. Update cache
setting where size does not write to proper region.
Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Diffstat (limited to 'cpu')
-rw-r--r-- | cpu/mcf532x/start.S | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/cpu/mcf532x/start.S b/cpu/mcf532x/start.S index 5b134aa47c..5abd944eb4 100644 --- a/cpu/mcf532x/start.S +++ b/cpu/mcf532x/start.S @@ -284,7 +284,7 @@ _int_handler: icache_enable: move.l #0x01000000, %d0 /* Invalidate cache cmd */ movec %d0, %CACR /* Invalidate cache */ - move.l #(CONFIG_SYS_SDRAM_BASE + 0xc000 + ((CONFIG_SYS_SDRAM_SIZE & 0x1fe0) << 11)), %d0 + move.l #(CONFIG_SYS_SDRAM_BASE + 0xc000 + ((CONFIG_SYS_SDRAM_SIZE & 0x1fe0 - 1) << 16)), %d0 movec %d0, %ACR0 /* Enable cache */ move.l #0x80000200, %d0 /* Setup cache mask */ |