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| author | Tom Rini <trini@konsulko.com> | 2022-12-04 18:03:50 +0300 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2022-12-23 18:09:42 +0300 |
| commit | 0613c36a7a5973d58a50b764ee647099e80cc97d (patch) | |
| tree | 0077e539fdd54654a1d401fd845e196e704d9509 /doc/README.fsl-ddr | |
| parent | fb55ac2cfe017b5f83d97f25e3ed2ceaa9946405 (diff) | |
| download | u-boot-0613c36a7a5973d58a50b764ee647099e80cc97d.tar.xz | |
global: Migrate CONFIG_EXTRA_ENV_SETTINGS to CFG
Perform a simple rename of CONFIG_EXTRA_ENV_SETTINGS to CFG_EXTRA_ENV_SETTINGS
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'doc/README.fsl-ddr')
| -rw-r--r-- | doc/README.fsl-ddr | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/doc/README.fsl-ddr b/doc/README.fsl-ddr index 10e63f3be1..f44bb2aa25 100644 --- a/doc/README.fsl-ddr +++ b/doc/README.fsl-ddr @@ -56,8 +56,8 @@ Table of 2-way interleaving modes supported in cpu/8xxx/ddr/ The ways to configure the ddr interleaving mode ============================================== 1. In board header file(e.g.MPC8572DS.h), add default interleaving setting - under "CONFIG_EXTRA_ENV_SETTINGS", like: - #define CONFIG_EXTRA_ENV_SETTINGS \ + under "CFG_EXTRA_ENV_SETTINGS", like: + #define CFG_EXTRA_ENV_SETTINGS \ "hwconfig=fsl_ddr:ctlr_intlv=bank" \ ...... |