diff options
author | Simon Glass <sjg@chromium.org> | 2020-02-06 19:55:01 +0300 |
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committer | Bin Meng <bmeng.cn@gmail.com> | 2020-02-07 17:46:35 +0300 |
commit | e85cbe8b34147126cdd5dab09f4c745157f6083c (patch) | |
tree | c10d0fddb089e0a89e446b4dc33d770c2ec55a68 /doc/device-tree-bindings/interrupt-controller | |
parent | 025543554c36615a66d66c154f3f763ac788ee15 (diff) | |
download | u-boot-e85cbe8b34147126cdd5dab09f4c745157f6083c.tar.xz |
x86: Add support for ACPI general-purpose events
ACPI GPEs are used to signal interrupts from peripherals that are accessed
via ACPI. In U-Boot these are modelled as interrupts using a separate
interrupt controller. Configuration is via the device tree.
Add a simple driver for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'doc/device-tree-bindings/interrupt-controller')
-rw-r--r-- | doc/device-tree-bindings/interrupt-controller/intel,acpi-gpe.txt | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/doc/device-tree-bindings/interrupt-controller/intel,acpi-gpe.txt b/doc/device-tree-bindings/interrupt-controller/intel,acpi-gpe.txt new file mode 100644 index 0000000000..d9252bf29f --- /dev/null +++ b/doc/device-tree-bindings/interrupt-controller/intel,acpi-gpe.txt @@ -0,0 +1,30 @@ +* Intel Advanced Configuration and Power Interface General Purpose Events + +This describes an interrupt controller which provides access to GPEs supported +by the SoC. + +Required properties: + +- compatible : "intel,acpi-gpe" +- interrupt-controller : Identifies the node as an interrupt controller +- #interrupt-cells : The number of cells to define the interrupts. Must be 2: + cell 0: interrupt number (normally >=32 since GPEs below that are reserved) + cell 1: 0 (flags, but none are currently defined) +- reg : The register bank for the controller (set this to the ACPI base). + +Example: + + general-purpose-events { + reg = <IOMAP_ACPI_BASE IOMAP_ACPI_SIZE>; + compatible = "intel,acpi-gpe"; + interrupt-controller; + #interrupt-cells = <2>; + }; + + ... + tpm@50 { + reg = <0x50>; + compatible = "google,cr50"; + ready-gpio = <&gpio_n 0x1c GPIO_ACTIVE_LOW>; + interrupts-extended = <&acpi_gpe 0x3c 0>; + }; |