diff options
author | Konstantin Porotchkin <kostap@marvell.com> | 2016-12-08 13:22:30 +0300 |
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committer | Stefan Roese <sr@denx.de> | 2016-12-12 11:04:52 +0300 |
commit | f99386c5b17c6924c742ceb21b1378207deb5bec (patch) | |
tree | 3754b34ddace5d8e55dfd9feb20e69de13de67b8 /doc/device-tree-bindings/pinctrl | |
parent | 656e6cc86b96be88f99f6f3ef1df3ef3122a8766 (diff) | |
download | u-boot-f99386c5b17c6924c742ceb21b1378207deb5bec.tar.xz |
arm64: mvebu: Add pin control nodes to A8K family DTS files
Add pin control nodes to APN806, CP-master, CP-slave and
Armada-7040 and Armada-8040 boards DTS files
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'doc/device-tree-bindings/pinctrl')
-rw-r--r-- | doc/device-tree-bindings/pinctrl/marvell,mvebu-pinctrl.txt | 44 |
1 files changed, 22 insertions, 22 deletions
diff --git a/doc/device-tree-bindings/pinctrl/marvell,mvebu-pinctrl.txt b/doc/device-tree-bindings/pinctrl/marvell,mvebu-pinctrl.txt index 0973db8ae6..5f86c0a00b 100644 --- a/doc/device-tree-bindings/pinctrl/marvell,mvebu-pinctrl.txt +++ b/doc/device-tree-bindings/pinctrl/marvell,mvebu-pinctrl.txt @@ -37,10 +37,10 @@ Example: pin-count = <20>; max-func = <3>; /* MPP Bus: - SPI0 [0-3] - I2C0 [4-5] - UART0 [11,19] - */ + * SPI0 [0-3] + * I2C0 [4-5] + * UART0 [11,19] + */ /* 0 1 2 3 4 5 6 7 8 9 */ pin-func = < 3 3 3 3 3 3 0 0 0 0 0 3 0 0 0 0 0 0 0 3>; @@ -59,20 +59,20 @@ Example: pin-count = <63>; max-func = <0xf>; /* MPP Bus: - [0-31] = 0xff: Keep default CP0_shared_pins: - [11] CLKOUT_MPP_11 (out) - [23] LINK_RD_IN_CP2CP (in) - [25] CLKOUT_MPP_25 (out) - [29] AVS_FB_IN_CP2CP (in) - [32,34] SMI - [31] GPIO: push button/Wake - [35-36] GPIO - [37-38] I2C - [40-41] SATA[0/1]_PRESENT_ACTIVEn - [42-43] XSMI - [44-55] RGMII1 - [56-62] SD - */ + * [0-31] = 0xff: Keep default CP0_shared_pins: + * [11] CLKOUT_MPP_11 (out) + * [23] LINK_RD_IN_CP2CP (in) + * [25] CLKOUT_MPP_25 (out) + * [29] AVS_FB_IN_CP2CP (in) + * [32,34] SMI + * [31] GPIO: push button/Wake + * [35-36] GPIO + * [37-38] I2C + * [40-41] SATA[0/1]_PRESENT_ACTIVEn + * [42-43] XSMI + * [44-55] RGMII1 + * [56-62] SD + */ /* 0 1 2 3 4 5 6 7 8 9 */ pin-func = < 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff @@ -95,10 +95,10 @@ Example: pin-count = <63>; max-func = <0xf>; /* MPP Bus: - [0-11] RGMII0 - [27,31] GE_MDIO/MDC - [32-62] = 0xff: Keep default CP1_shared_pins: - */ + * [0-11] RGMII0 + * [27,31] GE_MDIO/MDC + * [32-62] = 0xff: Keep default CP1_shared_pins: + */ /* 0 1 2 3 4 5 6 7 8 9 */ pin-func = < 0x3 0x3 0x3 0x3 0x3 0x3 0x3 0x3 0x3 0x3 0x3 0x3 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff |