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author | Magnus Lilja <lilja.magnus@gmail.com> | 2008-08-29 12:36:18 +0400 |
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committer | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2008-09-12 03:23:44 +0400 |
commit | 1a6337b01351b82a45b0defa76f08744511c580b (patch) | |
tree | 2a9a9e97ad896b5f337be1edfd747b3e57bff32b /doc | |
parent | 8c4ebec25b21e355b8488698ec1594da9701fff4 (diff) | |
download | u-boot-1a6337b01351b82a45b0defa76f08744511c580b.tar.xz |
i.MX31: Make the SPI bus and chip select configurable for MC13783
The i.MX31 has three SPI buses and each bus has several chip selects
and the MC13783 chip can be connected to any of these. The current
RTC driver for MC13783 is hardcoded for CSPI2/SS2.
This patch makes make MC13783 SPI bus and chip select configurable
via CONFIG_MC13783_SPI_BUS and CONFIG_MC13783_SPI_CS.
Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
Diffstat (limited to 'doc')
-rw-r--r-- | doc/README.mx31 | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/doc/README.mx31 b/doc/README.mx31 new file mode 100644 index 0000000000..f912b66fed --- /dev/null +++ b/doc/README.mx31 @@ -0,0 +1,19 @@ + +U-Boot for Freescale i.MX31 + +This file contains information for the port of U-Boot to the Freescale +i.MX31 SoC. + +1. CONFIGURATION OPTIONS/SETTINGS +--------------------------------- + +1.1 Configuration of MC13783 SPI bus +------------------------------------ +The power management companion chip MC13783 is connected to the +i.MX31 via an SPI bus. Use the following configuration options +to setup the bus and chip select used for a particular board. + +CONFIG_MC13783_SPI_BUS -- defines the SPI bus the MC13783 is connected to. + Note that 0 is CSPI1, 1 is CSPI2 and 2 is CSPI3. +CONFIG_MC13783_SPI_CS -- define the chip select the MC13783 s connected to. + |