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author | Tom Rini <trini@konsulko.com> | 2017-08-26 22:10:38 +0300 |
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committer | Tom Rini <trini@konsulko.com> | 2017-08-26 22:10:38 +0300 |
commit | cc0427d2695220961f43dfb5e110511a9cb8ae16 (patch) | |
tree | 9f70ca4a0a23892fe3ec9c66cc0ba4ae83833054 /doc | |
parent | c2150e4dc1b35dd7654103f1d4f8abc63a9a1cfc (diff) | |
parent | a430556ecb630d26880b34b914b6ec29f5454d01 (diff) | |
download | u-boot-cc0427d2695220961f43dfb5e110511a9cb8ae16.tar.xz |
Merge git://git.denx.de/u-boot-i2c
Diffstat (limited to 'doc')
-rw-r--r-- | doc/device-tree-bindings/i2c/i2c-stm32.txt | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/doc/device-tree-bindings/i2c/i2c-stm32.txt b/doc/device-tree-bindings/i2c/i2c-stm32.txt new file mode 100644 index 0000000000..df03743ace --- /dev/null +++ b/doc/device-tree-bindings/i2c/i2c-stm32.txt @@ -0,0 +1,30 @@ +* I2C controller embedded in STMicroelectronis STM32 platforms + +Required properties : +- compatible : Must be "st,stm32f7-i2c" +- reg : Offset and length of the register set for the device +- resets: Must contain the phandle to the reset controller +- clocks: Must contain the input clock of the I2C instance +- A pinctrl state named "default" must be defined to set pins in mode of + operation for I2C transfer +- #address-cells = <1>; +- #size-cells = <0>; + +Optional properties : +- clock-frequency : Desired I2C bus clock frequency in Hz. If not specified, + the default 100 kHz frequency will be used. As only Normal, Fast and Fast+ + modes are implemented, possible values are 100000, 400000 and 1000000. + +Example : + + i2c1: i2c@40005400 { + compatible = "st,stm32f7-i2c"; + reg = <0x40005400 0x400>; + resets = <&rcc 181>; + clocks = <&clk_pclk1>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + clock-frequency = <400000>; + #address-cells = <1>; + #size-cells = <0>; + }; |