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| author | Simon Glass <sjg@chromium.org> | 2022-10-21 03:23:03 +0300 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2022-10-31 18:02:44 +0300 |
| commit | 44ad35a0f699b0b49ef6efaa1405b6f99c703ea8 (patch) | |
| tree | 5e747333f41e62e7641ed2d968c14890820359e3 /doc | |
| parent | b2d93c6aaa99f3f90470c0df3e49bd5ed265d350 (diff) | |
| download | u-boot-44ad35a0f699b0b49ef6efaa1405b6f99c703ea8.tar.xz | |
image: Add the concept of a phase to FIT
We want to be able to mark an image as related to a phase, so we can
easily load all the images for SPL or for U-Boot proper.
Add this to the FIT specification, along with some access functions.
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'doc')
| -rw-r--r-- | doc/uImage.FIT/source_file_format.txt | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/doc/uImage.FIT/source_file_format.txt b/doc/uImage.FIT/source_file_format.txt index 0a03c942bd..4640e38e3c 100644 --- a/doc/uImage.FIT/source_file_format.txt +++ b/doc/uImage.FIT/source_file_format.txt @@ -190,6 +190,9 @@ the '/images' node should have the following layout: Xilinx Zynq UltraScale+ (ZymqMP) device. "u-boot,zynqmp-fpga-enc" - encrypted FPGA bitstream for Xilinx Zynq UltraScale+ (ZynqMP) device. + - phase : U-Boot phase for which the image is intended. + "spl" - image is an SPL image + "u-boot" - image is a U-Boot image Optional nodes: - hash-1 : Each hash sub-node represents separate hash or checksum |