diff options
| author | Peng Ma <peng.ma@nxp.com> | 2019-11-19 09:17:36 +0300 |
|---|---|---|
| committer | Priyanka Jain <priyanka.jain@nxp.com> | 2019-11-19 11:41:44 +0300 |
| commit | e08b5b1465bd9e5478cd9bac083bc4154190dcf0 (patch) | |
| tree | 6b76f01bbc17e6475823fa7cbc3bd47be679bdbd /drivers/ata/fsl_sata.h | |
| parent | d4a31e8ee5592072d8d5208b3e950cba2d89b6bd (diff) | |
| download | u-boot-e08b5b1465bd9e5478cd9bac083bc4154190dcf0.tar.xz | |
ata: fsl_sata: Add DM support for Freescale PowerPC SATA driver
Add DM support for Freescale PowerPC sata driver used for PowerPC T series
SoCs,
CONFIG_BLK needs to be enabled on these platforms. It adds the SATA
controller as AHCI device, which is strictly speaking not correct,
as the controller is not AHCI compatible, But the U-Boot AHCI uclass
interface enables the usage of this DM driver,
Also fix below warning while PowerPC T series boards compilation,
===================== WARNING ======================"
This board does use CONFIG_LIBATA but has CONFIG_AHCI not"
enabled. Please update the storage controller driver to use"
CONFIG_AHCI before the v2019.07 release."
Failure to update by the deadline may result in board removal."
See doc/driver-model/MIGRATION.txt for more info."
===================================================="
Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Diffstat (limited to 'drivers/ata/fsl_sata.h')
| -rw-r--r-- | drivers/ata/fsl_sata.h | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/drivers/ata/fsl_sata.h b/drivers/ata/fsl_sata.h index a4ee83d187..5b9daa79e0 100644 --- a/drivers/ata/fsl_sata.h +++ b/drivers/ata/fsl_sata.h @@ -1,7 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright (C) 2007-2008 Freescale Semiconductor, Inc. - * Dave Liu <daveliu@freescale.com> + * Copyright 2019 NXP + * Author: Dave Liu <daveliu@freescale.com> */ #ifndef __FSL_SATA_H__ @@ -318,4 +319,14 @@ typedef struct fsl_sata { #define READ_CMD 0 #define WRITE_CMD 1 +#if CONFIG_IS_ENABLED(BLK) +struct fsl_ata_priv { + u32 base; + u32 flag; + u32 number; + u32 offset; + fsl_sata_t *fsl_sata; +}; +#endif + #endif /* __FSL_SATA_H__ */ |