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authorDinh Nguyen <dinguyen@kernel.org>2019-04-24 00:55:03 +0300
committerTom Rini <trini@konsulko.com>2019-05-05 15:48:50 +0300
commit84b124db3584d8b3f1a42c1506983323bce9983f (patch)
treeb343ae85d7c2600aca0edd911b4b01c6975ac4ad /drivers/cache/sandbox_cache.c
parent2bac27ce945e8399ea2c1404310ead450c065819 (diff)
downloadu-boot-84b124db3584d8b3f1a42c1506983323bce9983f.tar.xz
dm: cache: Create a uclass for cache
The cache UCLASS will be used for configure settings that can be found in a CPU's L2 cache controller. Add a uclass and a test for cache. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Diffstat (limited to 'drivers/cache/sandbox_cache.c')
-rw-r--r--drivers/cache/sandbox_cache.c34
1 files changed, 34 insertions, 0 deletions
diff --git a/drivers/cache/sandbox_cache.c b/drivers/cache/sandbox_cache.c
new file mode 100644
index 0000000000..14cc6b0c0a
--- /dev/null
+++ b/drivers/cache/sandbox_cache.c
@@ -0,0 +1,34 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2019 Intel Corporation <www.intel.com>
+ */
+
+#include <common.h>
+#include <cache.h>
+#include <dm.h>
+#include <errno.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static int sandbox_get_info(struct udevice *dev, struct cache_info *info)
+{
+ info->base = 0x11223344;
+
+ return 0;
+}
+
+static const struct cache_ops sandbox_cache_ops = {
+ .get_info = sandbox_get_info,
+};
+
+static const struct udevice_id sandbox_cache_ids[] = {
+ { .compatible = "sandbox,cache" },
+ { }
+};
+
+U_BOOT_DRIVER(cache_sandbox) = {
+ .name = "cache_sandbox",
+ .id = UCLASS_CACHE,
+ .of_match = sandbox_cache_ids,
+ .ops = &sandbox_cache_ops,
+};