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authorPatrick Delaunay <patrick.delaunay@foss.st.com>2021-06-29 13:01:07 +0300
committerPatrick Delaunay <patrick.delaunay@foss.st.com>2021-07-16 10:28:46 +0300
commit7e549345329a5c870fbc10b59b6a4cd6aab531a5 (patch)
tree1a45594ecd604331d8bdd6aefbdcf1801b604757 /drivers/clk
parent80cfc6c692d2616d17ab4ed648fe93c4faec61d5 (diff)
downloadu-boot-7e549345329a5c870fbc10b59b6a4cd6aab531a5.tar.xz
arm: dts: stm32mp15: alignment with v5.13
Device tree alignment with Linux kernel v5.13 - ARM: dts: stm32: Add PTP clock to Ethernet controller - ARM: dts: stm32: enable the analog filter for all I2C nodes in stm32mp151 - ARM: dts: stm32: fix usart 2 & 3 pinconf to wake up with flow control - ARM: dts: stm32: Add wakeup management on stm32mp15x UART nodes - ARM: dts: stm32: add #clock-cells property to usbphyc node on stm32mp151 - ARM: dts: stm32: Add STM32MP1 I2C6 SDA/SCL pinmux - ARM: dts: stm32: Rename mmc controller nodes to mmc@ - ARM: dts: stm32: Add additional init state for SDMMC1 pins Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Diffstat (limited to 'drivers/clk')
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