diff options
| author | Ashok Reddy Soma <ashok.reddy.soma@amd.com> | 2023-07-20 10:28:59 +0300 |
|---|---|---|
| committer | Michal Simek <michal.simek@amd.com> | 2023-07-21 10:00:39 +0300 |
| commit | 2a907542c77610817504321f32a78422f9a23d1d (patch) | |
| tree | 7da3617379af83d0dbdba59cad01025524f6deb6 /drivers/clk | |
| parent | 7a480fd995e279dd883b9e4e24741f9c71d66143 (diff) | |
| download | u-boot-2a907542c77610817504321f32a78422f9a23d1d.tar.xz | |
clk: zynqmp: Add gem rx and tsu clocks to return register
Add gem_tsu and gem0_rx till gem3_rx to return proper register from
zynqmp_clk_get_register. Otherwise firmware won't be able to set clock
for these due to incorrect register address.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230720072859.3724-1-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Diffstat (limited to 'drivers/clk')
| -rw-r--r-- | drivers/clk/clk_zynqmp.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/clk/clk_zynqmp.c b/drivers/clk/clk_zynqmp.c index 53327cf9ad..1cfe0e25b1 100644 --- a/drivers/clk/clk_zynqmp.c +++ b/drivers/clk/clk_zynqmp.c @@ -270,17 +270,22 @@ static u32 zynqmp_clk_get_register(enum zynqmp_clk id) case usb3_dual_ref: return CRL_APB_USB3_DUAL_REF_CTRL; case gem_tsu_ref: + case gem_tsu: return CRL_APB_GEM_TSU_REF_CTRL; case gem0_tx: + case gem0_rx: case gem0_ref: return CRL_APB_GEM0_REF_CTRL; case gem1_tx: + case gem1_rx: case gem1_ref: return CRL_APB_GEM1_REF_CTRL; case gem2_tx: + case gem2_rx: case gem2_ref: return CRL_APB_GEM2_REF_CTRL; case gem3_tx: + case gem3_rx: case gem3_ref: return CRL_APB_GEM3_REF_CTRL; case usb0_bus_ref: |