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authorSean Anderson <seanga2@gmail.com>2020-09-28 17:52:27 +0300
committerAndes <uboot@andestech.com>2020-09-30 03:54:46 +0300
commita952c3a4546ba1d6c5a487cae2e73760ecfd0c60 (patch)
treea41659d1b796f45516d74592e223c937b6969c4a /drivers/clk
parente5ca9a752399c2701cb71527d198bfa78268580d (diff)
downloadu-boot-a952c3a4546ba1d6c5a487cae2e73760ecfd0c60.tar.xz
riscv: clk: Add CLINT clock to kendryte clock driver
Another "virtual" clock (in the sense that it isn't configurable). This could possibly be done as a clock in the device tree, but I think this is a bit cleaner. Signed-off-by: Sean Anderson <seanga2@gmail.com>
Diffstat (limited to 'drivers/clk')
-rw-r--r--drivers/clk/kendryte/clk.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/clk/kendryte/clk.c b/drivers/clk/kendryte/clk.c
index 981b3b7699..bb196961af 100644
--- a/drivers/clk/kendryte/clk.c
+++ b/drivers/clk/kendryte/clk.c
@@ -646,6 +646,10 @@ static int k210_clk_probe(struct udevice *dev)
REGISTER_GATE(K210_CLK_RTC, "rtc", in0);
#undef REGISTER_GATE
+ /* The MTIME register in CLINT runs at one 50th the CPU clock speed */
+ clk_dm(K210_CLK_CLINT,
+ clk_register_fixed_factor(NULL, "clint", "cpu", 0, 1, 50));
+
return 0;
}