diff options
| author | Aymen Sghaier <aymen.sghaier@nxp.com> | 2021-03-25 12:30:28 +0300 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2021-04-08 10:18:29 +0300 |
| commit | a018e6e4f7c58fe3e82d17ea552db3449c60dacc (patch) | |
| tree | 7b84771f3b6ceb770ec40f662ffc8793edd7419a /drivers/crypto/fsl/fsl_hash.c | |
| parent | 2532429b166246ef82b975435925e2772df3e70b (diff) | |
| download | u-boot-a018e6e4f7c58fe3e82d17ea552db3449c60dacc.tar.xz | |
crypto: caam: Fix pointer size to 32bit for i.MX8M
The CAAM block used in i.MX8M is 32 bits address size but when the flag
PHYS_64BIT is enabled for armv8, the CAAM driver will try to use a
wrong pointer size.
This patch fixes this issue.
Signed-off-by: Aymen Sghaier <aymen.sghaier@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'drivers/crypto/fsl/fsl_hash.c')
| -rw-r--r-- | drivers/crypto/fsl/fsl_hash.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/crypto/fsl/fsl_hash.c b/drivers/crypto/fsl/fsl_hash.c index 61f953e8a6..75500a621f 100644 --- a/drivers/crypto/fsl/fsl_hash.c +++ b/drivers/crypto/fsl/fsl_hash.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2014 Freescale Semiconductor, Inc. + * Copyright 2018 NXP * */ @@ -95,7 +96,7 @@ static int caam_hash_update(void *hash_ctx, const void *buf, return -EINVAL; } -#ifdef CONFIG_PHYS_64BIT +#if defined(CONFIG_PHYS_64BIT) && !defined(CONFIG_IMX8M) sec_out32(&ctx->sg_tbl[ctx->sg_num].addr_hi, (uint32_t)(addr >> 32)); #else sec_out32(&ctx->sg_tbl[ctx->sg_num].addr_hi, 0x0); |