diff options
| author | Ley Foon Tan <ley.foon.tan@intel.com> | 2019-11-27 10:55:27 +0300 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2020-01-07 16:38:33 +0300 |
| commit | 6a48c34c250e41765951586d3389c0df69b2dbe1 (patch) | |
| tree | 64cb54790f6ee39a919eb7e0d8617fc8b80a2050 /drivers/ddr/altera/Kconfig | |
| parent | 733cc6cbcc1c0f212decabceb71925411d1c277c (diff) | |
| download | u-boot-6a48c34c250e41765951586d3389c0df69b2dbe1.tar.xz | |
ddr: altera: agilex: Add SDRAM driver for Agilex
Add SDRAM driver for Agilex SoC.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Diffstat (limited to 'drivers/ddr/altera/Kconfig')
| -rw-r--r-- | drivers/ddr/altera/Kconfig | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/ddr/altera/Kconfig b/drivers/ddr/altera/Kconfig index 2b1c1be3b5..8f590dc5f6 100644 --- a/drivers/ddr/altera/Kconfig +++ b/drivers/ddr/altera/Kconfig @@ -1,8 +1,8 @@ config SPL_ALTERA_SDRAM bool "SoCFPGA DDR SDRAM driver in SPL" depends on SPL - depends on TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 || TARGET_SOCFPGA_STRATIX10 - select RAM if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_STRATIX10 - select SPL_RAM if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_STRATIX10 + depends on TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 || TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX + select RAM if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX + select SPL_RAM if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX help Enable DDR SDRAM controller for the SoCFPGA devices. |