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| author | Dalon Westergreen <dwesterg@gmail.com> | 2018-09-10 20:28:48 +0300 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2018-09-15 04:17:01 +0300 |
| commit | 3570469742aec30fed0b423708df346176fa9438 (patch) | |
| tree | 996a70e1a7a48eefae99200cc38cd6891a6eb0cb /drivers/ddr/altera | |
| parent | 2ff60af605d64218374dbaf71cf47be865f84192 (diff) | |
| download | u-boot-3570469742aec30fed0b423708df346176fa9438.tar.xz | |
arm: socfpga: stratix10: add CONFIG_SPL_TARGET
Stratix10 combines the u-boot-spl image into the fpga configuration
bitstream so that the SDM can load the processors memory. This
process requires a hex format of the u-boot-spl image.
CONFIG_SPL_TARGET is set to "spl/u-boot-spl.hex"
Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
Diffstat (limited to 'drivers/ddr/altera')
0 files changed, 0 insertions, 0 deletions