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author | Joakim Tjernlund <joakim.tjernlund@infinera.com> | 2019-11-20 19:07:34 +0300 |
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committer | Priyanka Jain <priyanka.jain@nxp.com> | 2020-06-04 16:23:20 +0300 |
commit | 73af094c8444ea6affc607d3ca7704419b3fbfd8 (patch) | |
tree | b56fb9a9bdc6de3a83ba20ef6eb16efce74635e9 /drivers/ddr/fsl/ctrl_regs.c | |
parent | a0f47e012fb679baa927feb3e673503c88083aa0 (diff) | |
download | u-boot-73af094c8444ea6affc607d3ca7704419b3fbfd8.tar.xz |
ddr: fsl: Impl. Erratum A008109
Impl. erratum as descibed in errata doc.
Enable A008109 for T1040 and T1024
Signed-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Diffstat (limited to 'drivers/ddr/fsl/ctrl_regs.c')
-rw-r--r-- | drivers/ddr/fsl/ctrl_regs.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/ddr/fsl/ctrl_regs.c b/drivers/ddr/fsl/ctrl_regs.c index 2d3fb1953b..0e98ba4b4a 100644 --- a/drivers/ddr/fsl/ctrl_regs.c +++ b/drivers/ddr/fsl/ctrl_regs.c @@ -2628,6 +2628,12 @@ compute_fsl_memctl_config_regs(const unsigned int ctrl_num, } #endif +#ifdef CONFIG_SYS_FSL_ERRATUM_A008109 + ddr->ddr_sdram_cfg_2 = ddr_in32(&ddr->ddr_sdram_cfg_2) | 0x800; /* DDR_SLOW */ + ddr->debug[18] = ddr_in32(&ddrc->debug[18]) | 0x2; + ddr->debug[28] = 0x30000000; +#endif + #ifdef CONFIG_SYS_FSL_ERRATUM_A009942 ddr_freq = get_ddr_freq(ctrl_num) / 1000000; ddr->debug[28] |= ddr_in32(&ddrc->debug[28]); |