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author | Tom Rini <trini@konsulko.com> | 2021-09-27 16:45:36 +0300 |
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committer | Tom Rini <trini@konsulko.com> | 2021-09-27 16:45:36 +0300 |
commit | e908d20fcbd847e17345591fc171b59d9a156516 (patch) | |
tree | def104237fd9b8888a37a5c3378b4ef7e26b6d43 /drivers/ddr | |
parent | bb38d77ca779cc8bdad3d4ceb6cecc687f4987c2 (diff) | |
parent | 0b9bcf665cd98fe9db0956c894006b250a7d465f (diff) | |
download | u-boot-e908d20fcbd847e17345591fc171b59d9a156516.tar.xz |
Merge tag 'v2021.10-rc5' into next
Prepare v2021.10-rc5
Diffstat (limited to 'drivers/ddr')
-rw-r--r-- | drivers/ddr/altera/sequencer.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/ddr/altera/sequencer.c b/drivers/ddr/altera/sequencer.c index 6b9b2e9094..8a016f0628 100644 --- a/drivers/ddr/altera/sequencer.c +++ b/drivers/ddr/altera/sequencer.c @@ -3714,7 +3714,7 @@ static void debug_mem_calibrate(struct socfpga_sdrseq *seq, int pass) u32 debug_info; if (pass) { - debug("%s: CALIBRATION PASSED\n", __FILE__); + debug(KBUILD_BASENAME ": CALIBRATION PASSED\n"); seq->gbl.fom_in /= 2; seq->gbl.fom_out /= 2; @@ -3733,7 +3733,7 @@ static void debug_mem_calibrate(struct socfpga_sdrseq *seq, int pass) writel(debug_info, &phy_mgr_cfg->cal_debug_info); writel(PHY_MGR_CAL_SUCCESS, &phy_mgr_cfg->cal_status); } else { - debug("%s: CALIBRATION FAILED\n", __FILE__); + debug(KBUILD_BASENAME ": CALIBRATION FAILED\n"); debug_info = seq->gbl.error_stage; debug_info |= seq->gbl.error_substage << 8; @@ -3750,7 +3750,7 @@ static void debug_mem_calibrate(struct socfpga_sdrseq *seq, int pass) writel(debug_info, &sdr_reg_file->failing_stage); } - debug("%s: Calibration complete\n", __FILE__); + debug(KBUILD_BASENAME ": Calibration complete\n"); } /** @@ -3934,7 +3934,7 @@ int sdram_calibration_full(struct socfpga_sdr *sdr) initialize_tracking(&seq); - debug("%s: Preparing to start memory calibration\n", __FILE__); + debug(KBUILD_BASENAME ": Preparing to start memory calibration\n"); debug("%s:%d\n", __func__, __LINE__); debug_cond(DLEVEL >= 1, |