diff options
| author | Simon Glass <sjg@chromium.org> | 2020-01-23 21:48:15 +0300 |
|---|---|---|
| committer | Heiko Schocher <hs@denx.de> | 2020-01-27 09:22:01 +0300 |
| commit | 96fe11c3dace9038e2df0e7c4625d1c3e330425f (patch) | |
| tree | 031e52df4c897ca563ccf299ba16b2eaa7fe53bd /drivers/i2c/designware_i2c.h | |
| parent | e71b6f6622d6a3380d866943799f36e473a3cd9b (diff) | |
| download | u-boot-96fe11c3dace9038e2df0e7c4625d1c3e330425f.tar.xz | |
i2c: designware_i2c: Add spike supression
Some versions of this peripheral include a spike-suppression phase of the
bus. Add support for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Diffstat (limited to 'drivers/i2c/designware_i2c.h')
| -rw-r--r-- | drivers/i2c/designware_i2c.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/i2c/designware_i2c.h b/drivers/i2c/designware_i2c.h index f32dc0f854..8789c7d8ce 100644 --- a/drivers/i2c/designware_i2c.h +++ b/drivers/i2c/designware_i2c.h @@ -176,6 +176,7 @@ struct dw_scl_sda_cfg { * @scl_rise_time_ns: Configured SCL rise time in nanoseconds * @scl_fall_time_ns: Configured SCL fall time in nanoseconds * @sda_hold_time_ns: Configured SDA hold time in nanoseconds + * @has_spk_cnt: true if the spike-count register is present * @clk: Clock input to the I2C controller */ struct dw_i2c { @@ -185,6 +186,7 @@ struct dw_i2c { u32 scl_rise_time_ns; u32 scl_fall_time_ns; u32 sda_hold_time_ns; + bool has_spk_cnt; #if CONFIG_IS_ENABLED(CLK) struct clk clk; #endif |