diff options
| author | Usama Arif <usama.arif@arm.com> | 2021-10-19 17:49:48 +0300 |
|---|---|---|
| committer | Jaehoon Chung <jh80.chung@samsung.com> | 2021-10-29 12:22:32 +0300 |
| commit | c95b0297e95613fc68b1d92118ee64720d142f8c (patch) | |
| tree | 9d1b3a9dddc72198f5f823135d60bed7b358faf3 /drivers/mmc/arm_pl180_mmci.c | |
| parent | 44645f87de513468a8c8082d057704df0495d7a4 (diff) | |
| download | u-boot-c95b0297e95613fc68b1d92118ee64720d142f8c.tar.xz | |
mmc: arm_pl180_mmci: Enable HWFC for specific versions of MCI
There are 4 registers (PERIPHID{0-3}) that contain the ID of MCI.
For MMCs' with peripheral id 0x02041180 and 0x03041180, H/W flow control
needs to be enabled for multi block writes (MMC CMD 18).
Signed-off-by: Usama Arif <usama.arif@arm.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Diffstat (limited to 'drivers/mmc/arm_pl180_mmci.c')
| -rw-r--r-- | drivers/mmc/arm_pl180_mmci.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/drivers/mmc/arm_pl180_mmci.c b/drivers/mmc/arm_pl180_mmci.c index f99b5f997e..9c5d48e90c 100644 --- a/drivers/mmc/arm_pl180_mmci.c +++ b/drivers/mmc/arm_pl180_mmci.c @@ -282,6 +282,14 @@ static int host_request(struct mmc *dev, return result; } +static int check_peripheral_id(struct pl180_mmc_host *host, u32 periph_id) +{ + return readl(&host->base->periph_id0) == (periph_id & 0xFF) && + readl(&host->base->periph_id1) == ((periph_id >> 8) & 0xFF) && + readl(&host->base->periph_id2) == ((periph_id >> 16) & 0xFF) && + readl(&host->base->periph_id3) == ((periph_id >> 24) & 0xFF); +} + static int host_set_ios(struct mmc *dev) { struct pl180_mmc_host *host = dev->priv; @@ -337,6 +345,12 @@ static int host_set_ios(struct mmc *dev) sdi_clkcr &= ~(SDI_CLKCR_WIDBUS_MASK); sdi_clkcr |= buswidth; } + /* For MMCs' with peripheral id 0x02041180 and 0x03041180, H/W flow control + * needs to be enabled for multi block writes (MMC CMD 18). + */ + if (check_peripheral_id(host, 0x02041180) || + check_peripheral_id(host, 0x03041180)) + sdi_clkcr |= SDI_CLKCR_HWFCEN; writel(sdi_clkcr, &host->base->clock); udelay(CLK_CHANGE_DELAY); |