diff options
| author | Rick Chen <rick@andestech.com> | 2017-08-28 11:44:11 +0300 |
|---|---|---|
| committer | Rick Chen <rickchen36@gmail.com> | 2017-11-30 05:01:50 +0300 |
| commit | 252185f22470d3bf828c7e989dfa06b83bb2e572 (patch) | |
| tree | 8aad9775d96e0afe0dfab81b5ed1871908d5f18f /drivers/mmc/ftsdc010_mci.h | |
| parent | 9f678ab139cd6ef0ab98759d63f1cee0fa534b66 (diff) | |
| download | u-boot-252185f22470d3bf828c7e989dfa06b83bb2e572.tar.xz | |
nds32: ftsdc010: Support ftsdc010 DM.
ftsdc010 support device tree flow.
Signed-off-by: Rick Chen <rick@andestech.com>
Diffstat (limited to 'drivers/mmc/ftsdc010_mci.h')
| -rw-r--r-- | drivers/mmc/ftsdc010_mci.h | 53 |
1 files changed, 53 insertions, 0 deletions
diff --git a/drivers/mmc/ftsdc010_mci.h b/drivers/mmc/ftsdc010_mci.h new file mode 100644 index 0000000000..31a27fd772 --- /dev/null +++ b/drivers/mmc/ftsdc010_mci.h @@ -0,0 +1,53 @@ +/* + * Faraday FTSDC010 Secure Digital Memory Card Host Controller + * + * Copyright (C) 2011 Andes Technology Corporation + * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#include <mmc.h> + +#ifndef __FTSDC010_MCI_H +#define __FTSDC010_MCI_H + +struct ftsdc010_chip { + void __iomem *regs; + uint32_t wprot; /* write protected (locked) */ + uint32_t rate; /* actual SD clock in Hz */ + uint32_t sclk; /* FTSDC010 source clock in Hz */ + uint32_t fifo; /* fifo depth in bytes */ + uint32_t acmd; + struct mmc_config cfg; /* mmc configuration */ + const char *name; + void *ioaddr; + unsigned int caps; + unsigned int version; + unsigned int clock; + unsigned int bus_hz; + unsigned int div; + int dev_index; + int dev_id; + int buswidth; + u32 fifoth_val; + struct mmc *mmc; + void *priv; + bool fifo_mode; +}; + + +#ifdef CONFIG_DM_MMC +/* Export the operations to drivers */ +int ftsdc010_probe(struct udevice *dev); +extern const struct dm_mmc_ops dm_ftsdc010_ops; +#endif +void ftsdc_setup_cfg(struct mmc_config *cfg, const char *name, int buswidth, + uint caps, u32 max_clk, u32 min_clk); +void set_bus_width(struct ftsdc010_mmc __iomem *regs, struct mmc_config *cfg); + +#ifdef CONFIG_BLK +int ftsdc010_bind(struct udevice *dev, struct mmc *mmc, struct mmc_config *cfg); +#endif + + +#endif /* __FTSDC010_MCI_H */ |