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| author | Marek Vasut <marek.vasut+renesas@gmail.com> | 2019-01-12 01:45:54 +0300 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2019-02-09 13:08:40 +0300 |
| commit | 992bcf4f27794a7f578e0145ef1c933a87a1d83c (patch) | |
| tree | 837329bf68abe3870eef2c7697fd261bee7db128 /drivers/mmc/renesas-sdhi.c | |
| parent | 97276a91db8e98f081a40ddf9dc8f81d4032a756 (diff) | |
| download | u-boot-992bcf4f27794a7f578e0145ef1c933a87a1d83c.tar.xz | |
mmc: tmio: Make DMA transfer end bit configurable
Different versions of the SDHI core use either bit 17 or bit 20 for the
DTRAEND indication, which can differ even between SoC revisions. Make
the DTRAEND bit position part of the driver private data, so that the
probe function can set this accordingly. Set this to 20 on Socionext
SoCs and either 17 or 20 on Renesas SoCs, depending on the SoC.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'drivers/mmc/renesas-sdhi.c')
| -rw-r--r-- | drivers/mmc/renesas-sdhi.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/mmc/renesas-sdhi.c b/drivers/mmc/renesas-sdhi.c index 733b6d62f5..a556acd5cb 100644 --- a/drivers/mmc/renesas-sdhi.c +++ b/drivers/mmc/renesas-sdhi.c @@ -462,6 +462,16 @@ static void renesas_sdhi_filter_caps(struct udevice *dev) priv->nrtaps = 4; else priv->nrtaps = 8; + + /* H3 ES1.x and M3W ES1.0 uses bit 17 for DTRAEND */ + if (((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7795) && + (rmobile_get_cpu_rev_integer() <= 1)) || + ((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) && + (rmobile_get_cpu_rev_integer() == 1) && + (rmobile_get_cpu_rev_fraction() == 0))) + priv->read_poll_flag = TMIO_SD_DMA_INFO1_END_RD; + else + priv->read_poll_flag = TMIO_SD_DMA_INFO1_END_RD2; } static int renesas_sdhi_probe(struct udevice *dev) |