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authorSimon Glass <sjg@chromium.org>2021-08-07 16:24:09 +0300
committerSimon Glass <sjg@chromium.org>2021-09-25 18:46:15 +0300
commitf0ab8f9fbe73f2243a959641c909314494b771b6 (patch)
tree14610d0f4a178d8a0b1f7f287241776b2aab3ecd /drivers/mmc
parent4ee0cc89dbbeb2d6b08e702afc1332f7dec8a38f (diff)
downloadu-boot-f0ab8f9fbe73f2243a959641c909314494b771b6.tar.xz
clk: Rename clk_get_by_driver_info()
This is actually a misnomer now, since the phandle info may contain a driver_info index or a udevice index. Rename it to use the word 'phandle', which seems more accurate. Add a comment while we are here. Also add a test for this function. Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers/mmc')
-rw-r--r--drivers/mmc/ftsdc010_mci.c2
-rw-r--r--drivers/mmc/rockchip_dw_mmc.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/drivers/mmc/ftsdc010_mci.c b/drivers/mmc/ftsdc010_mci.c
index b8cafeb043..570d54cf9d 100644
--- a/drivers/mmc/ftsdc010_mci.c
+++ b/drivers/mmc/ftsdc010_mci.c
@@ -433,7 +433,7 @@ static int ftsdc010_mmc_probe(struct udevice *dev)
chip->priv = dev;
chip->dev_index = 1;
memcpy(priv->minmax, dtplat->clock_freq_min_max, sizeof(priv->minmax));
- ret = clk_get_by_driver_info(dev, dtplat->clocks, &priv->clk);
+ ret = clk_get_by_phandle(dev, dtplat->clocks, &priv->clk);
if (ret < 0)
return ret;
#endif
diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
index 855c0e7af5..7f8dea1e34 100644
--- a/drivers/mmc/rockchip_dw_mmc.c
+++ b/drivers/mmc/rockchip_dw_mmc.c
@@ -123,7 +123,7 @@ static int rockchip_dwmmc_probe(struct udevice *dev)
priv->minmax[0] = 400000; /* 400 kHz */
priv->minmax[1] = dtplat->max_frequency;
- ret = clk_get_by_driver_info(dev, dtplat->clocks, &priv->clk);
+ ret = clk_get_by_phandle(dev, dtplat->clocks, &priv->clk);
if (ret < 0)
return ret;
#else