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authorChris Packham <judge.packham@gmail.com>2022-05-29 02:13:17 +0300
committerTom Rini <trini@konsulko.com>2022-06-06 19:09:29 +0300
commitb19512f1cf28b853d308079c421e9c4c564b2242 (patch)
tree47a515772178fc48819e099fe7988fdd76d4d363 /drivers/mmc
parentbfbd62f69114fb4a8a1685e5d95b2e5789422fd4 (diff)
downloadu-boot-b19512f1cf28b853d308079c421e9c4c564b2242.tar.xz
Convert CONFIG_FIXED_SDHCI_ALIGNED_BUFFER to Kconfig
CONFIG_FIXED_SDHCI_ALIGNED_BUFFER is needed on some Marvell SoCs when booting from MMC. All existing usages of this have the same value so make this the default and have the Kconfig option depend on SPL && MVEBU_SPL_BOOT_DEVICE_MMC. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Marek BehĂșn <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'drivers/mmc')
-rw-r--r--drivers/mmc/Kconfig13
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index 5e2921ce41..c8f9709d2d 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -484,6 +484,19 @@ config SPL_MMC_SDHCI_ADMA
This enables support for the ADMA (Advanced DMA) defined
in the SD Host Controller Standard Specification Version 3.00 in SPL.
+config FIXED_SDHCI_ALIGNED_BUFFER
+ hex "SDRAM address for fixed buffer"
+ depends on SPL && MVEBU_SPL_BOOT_DEVICE_MMC
+ default 0x00180000
+ help
+ On the Marvell Armada 38x when the SPL runs it located in internal
+ SRAM which is the L2 cache locked to memory. When the MMC buffers
+ are located on the stack (or bss), the SDIO controller (SDHCI) can't
+ write into this L2 cache memory.
+
+ This specifies the address of a fixed buffer located in SDRAM that
+ will be used for all SDHCI transfers in the SPL.
+
config MMC_SDHCI_ASPEED
bool "Aspeed SDHCI controller"
depends on ARCH_ASPEED