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authorPatrick Delaunay <patrick.delaunay@foss.st.com>2022-01-04 16:24:00 +0300
committerTom Rini <trini@konsulko.com>2022-01-21 22:01:35 +0300
commit0f9595b9fa68ed1634adddf989fd037909eec433 (patch)
tree89dae645105ba8e369082ee22165dd0b57898185 /drivers/mtd
parent144fef87df7cf29b1ce772a73009e7c16908812b (diff)
downloadu-boot-0f9595b9fa68ed1634adddf989fd037909eec433.tar.xz
configs: Migrate CONFIG_SYS_MAX_FLASH_BANKS to Kconfig
Use moveconfig.py script to convert define CONFIG_SYS_MAX_FLASH_BANKS and CONFIG_SYS_MAX_FLASH_BANKS_DETECT to Kconfig and move these entries to defconfigs. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stefan Roese <sr@denx.de> [trini: Re-switch to IS_ENABLED check in spi-nor-core.c, re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'drivers/mtd')
-rw-r--r--drivers/mtd/Kconfig27
-rw-r--r--drivers/mtd/spi/spi-nor-core.c5
2 files changed, 30 insertions, 2 deletions
diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig
index a9c8c48ae6..bde3004171 100644
--- a/drivers/mtd/Kconfig
+++ b/drivers/mtd/Kconfig
@@ -31,6 +31,7 @@ config SYS_MTDPARTS_RUNTIME
config FLASH_CFI_DRIVER
bool "Enable CFI Flash driver"
+ select USE_SYS_MAX_FLASH_BANKS
help
The Common Flash Interface specification was developed by Intel,
AMD and other flash manufactures. It provides a universal method
@@ -82,6 +83,7 @@ config SYS_FLASH_CFI
config ALTERA_QSPI
bool "Altera Generic Quad SPI Controller"
depends on DM_MTD
+ select USE_SYS_MAX_FLASH_BANKS
help
This enables access to Altera EPCQ/EPCS flash chips using the
Altera Generic Quad SPI Controller. The controller converts SPI
@@ -91,6 +93,7 @@ config ALTERA_QSPI
config FLASH_PIC32
bool "Microchip PIC32 Flash driver"
depends on MACH_PIC32 && DM_MTD
+ select USE_SYS_MAX_FLASH_BANKS
help
This enables access to Microchip PIC32 internal non-CFI flash
chips through PIC32 Non-Volatile-Memory Controller.
@@ -112,10 +115,34 @@ config HBMC_AM654
config STM32_FLASH
bool "STM32 MCU Flash driver"
depends on ARCH_STM32
+ select USE_SYS_MAX_FLASH_BANKS
help
This is the driver of embedded flash for some STMicroelectronics
STM32 MCU.
+config USE_SYS_MAX_FLASH_BANKS
+ bool "Enable Max number of Flash memory banks"
+ help
+ When this option is enabled, the CONFIG_SYS_MAX_FLASH_BANKS
+ will be defined.
+
+config SYS_MAX_FLASH_BANKS
+ int "Max number of Flash memory banks"
+ depends on USE_SYS_MAX_FLASH_BANKS
+ default 1
+ help
+ Max number of Flash memory banks using by the MTD framework, in the
+ flash CFI driver and in some other driver to define the flash_info
+ struct declaration.
+
+config SYS_MAX_FLASH_BANKS_DETECT
+ bool "Detection of flash banks number in CFI driver"
+ depends on CFI_FLASH && FLASH_CFI_DRIVER
+ help
+ This enables detection of number of flash banks in CFI driver,
+ to reduce the effective number of flash bank, between 0 and
+ CONFIG_SYS_MAX_FLASH_BANKS
+
source "drivers/mtd/nand/Kconfig"
config SYS_NAND_MAX_CHIPS
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index 6acaa84d2b..a70fbda4bb 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -3707,8 +3707,9 @@ int spi_nor_scan(struct spi_nor *nor)
int ret;
int cfi_mtd_nb = 0;
- if (IS_ENABLED(CONFIG_FLASH_CFI_MTD))
- cfi_mtd_nb = CFI_FLASH_BANKS;
+#ifdef CONFIG_FLASH_CFI_MTD
+ cfi_mtd_nb = CFI_FLASH_BANKS;
+#endif
/* Reset SPI protocol for all commands. */
nor->reg_proto = SNOR_PROTO_1_1_1;