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author | Tom Rini <trini@konsulko.com> | 2021-09-30 18:29:41 +0300 |
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committer | Tom Rini <trini@konsulko.com> | 2021-09-30 18:29:41 +0300 |
commit | 8bef03683623d6a7adfff1f859ed44fad9e92ed7 (patch) | |
tree | be2734e3581e083ce199230c259a192914651bff /drivers/mtd | |
parent | c8988efc884c680eb4f34295df6689a7e312c15d (diff) | |
parent | dced079c53b283e15f04282f405de410a9be584d (diff) | |
download | u-boot-8bef03683623d6a7adfff1f859ed44fad9e92ed7.tar.xz |
Merge tag 'xilinx-for-v2022.01-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next
Xilinx changes for v2022.01-rc1
zynq:
- Enable capsule update for qspi and mmc
- Update zed DT qspi compatible string
zynqmp:
- Add missing modeboot for EMMC
- Add missing nand DT properties
- List all eeproms for SC on vck190
- Add vck190 SC psu_init
clk:
- Handle only GATE type clock for Versal
watchdog:
- Update versal driver to handle system reset
Diffstat (limited to 'drivers/mtd')
-rw-r--r-- | drivers/mtd/spi/Kconfig | 2 | ||||
-rw-r--r-- | drivers/mtd/spi/spi-nor-core.c | 17 |
2 files changed, 15 insertions, 4 deletions
diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig index ddeef37ffc..408a53f861 100644 --- a/drivers/mtd/spi/Kconfig +++ b/drivers/mtd/spi/Kconfig @@ -57,7 +57,7 @@ config SF_DEFAULT_CS config SF_DEFAULT_MODE hex "SPI Flash default mode (see include/spi.h)" depends on SPI_FLASH || DM_SPI_FLASH - default 3 + default 0 help The default mode may be provided by the platform to handle the common case when only a single serial diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index d5d905fa5a..f1b4e5ea8e 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -10,6 +10,7 @@ */ #include <common.h> +#include <flash.h> #include <log.h> #include <watchdog.h> #include <dm.h> @@ -26,6 +27,7 @@ #include <linux/mtd/mtd.h> #include <linux/mtd/spi-nor.h> +#include <mtd/cfi_flash.h> #include <spi-mem.h> #include <spi.h> @@ -3664,6 +3666,11 @@ int spi_nor_scan(struct spi_nor *nor) struct mtd_info *mtd = &nor->mtd; struct spi_slave *spi = nor->spi; int ret; + int cfi_mtd_nb = 0; + +#ifdef CONFIG_SYS_MAX_FLASH_BANKS + cfi_mtd_nb = CONFIG_SYS_MAX_FLASH_BANKS; +#endif /* Reset SPI protocol for all commands. */ nor->reg_proto = SNOR_PROTO_1_1_1; @@ -3715,8 +3722,12 @@ int spi_nor_scan(struct spi_nor *nor) if (ret) return ret; - if (!mtd->name) - mtd->name = info->name; + if (!mtd->name) { + sprintf(nor->mtd_name, "%s%d", + MTD_DEV_TYPE(MTD_DEV_TYPE_NOR), + cfi_mtd_nb + dev_seq(nor->dev)); + mtd->name = nor->mtd_name; + } mtd->dev = nor->dev; mtd->priv = nor; mtd->type = MTD_NORFLASH; @@ -3821,7 +3832,7 @@ int spi_nor_scan(struct spi_nor *nor) nor->rdsr_dummy = params.rdsr_dummy; nor->rdsr_addr_nbytes = params.rdsr_addr_nbytes; - nor->name = mtd->name; + nor->name = info->name; nor->size = mtd->size; nor->erase_size = mtd->erasesize; nor->sector_size = mtd->erasesize; |