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author | Tom Rini <trini@konsulko.com> | 2021-01-06 00:20:26 +0300 |
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committer | Tom Rini <trini@konsulko.com> | 2021-01-06 00:20:26 +0300 |
commit | 720620e6916ba40b9a173bb07706d2c73f3c23e7 (patch) | |
tree | b085821f1d1137d80e9bb73f405ea0680db338b9 /drivers/net/phy/cortina.c | |
parent | c86b18074c9d40bfa63cda1068b6dfb810d4377d (diff) | |
parent | 62b07b5173e3d04fabfac42cf1f4779d021f94ad (diff) | |
download | u-boot-720620e6916ba40b9a173bb07706d2c73f3c23e7.tar.xz |
Merge tag 'v2021.01-rc5' into next
Prepare v2021.01-rc5
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'drivers/net/phy/cortina.c')
-rw-r--r-- | drivers/net/phy/cortina.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/net/phy/cortina.c b/drivers/net/phy/cortina.c index dbc20b1405..b381a431fd 100644 --- a/drivers/net/phy/cortina.c +++ b/drivers/net/phy/cortina.c @@ -3,7 +3,7 @@ * Cortina CS4315/CS4340 10G PHY drivers * * Copyright 2014 Freescale Semiconductor, Inc. - * Copyright 2018 NXP + * Copyright 2018, 2020 NXP * */ @@ -29,7 +29,7 @@ #error The Cortina PHY needs 10G support #endif -#ifndef CORTINA_NO_FW_UPLOAD +#ifndef CONFIG_SYS_CORTINA_NO_FW_UPLOAD struct cortina_reg_config cortina_reg_cfg[] = { /* CS4315_enable_sr_mode */ {VILLA_GLOBAL_MSEQCLKCTRL, 0x8004}, @@ -227,7 +227,7 @@ void cs4340_upload_firmware(struct phy_device *phydev) int cs4340_phy_init(struct phy_device *phydev) { -#ifndef CORTINA_NO_FW_UPLOAD +#ifndef CONFIG_SYS_CORTINA_NO_FW_UPLOAD int timeout = 100; /* 100ms */ #endif int reg_value; @@ -238,7 +238,7 @@ int cs4340_phy_init(struct phy_device *phydev) * Boards designed with EEPROM attached to Cortina * does not require FW upload. */ -#ifndef CORTINA_NO_FW_UPLOAD +#ifndef CONFIG_SYS_CORTINA_NO_FW_UPLOAD /* step1: BIST test */ phy_write(phydev, 0x00, VILLA_GLOBAL_MSEQCLKCTRL, 0x0004); phy_write(phydev, 0x00, VILLA_GLOBAL_LINE_SOFT_RESET, 0x0000); |