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authorMinghuan Lian <Minghuan.Lian@nxp.com>2016-12-13 09:54:17 +0300
committerYork Sun <york.sun@nxp.com>2017-01-18 20:26:37 +0300
commit80afc63fc34286d363074d7779322c8720f346b5 (patch)
treed9ce24ee2294e5100434eb7c1bd4f1485fafe80f /drivers/pci/Kconfig
parenta7294aba086fb05ef2bbb50098a84d6c81e38a4b (diff)
downloadu-boot-80afc63fc34286d363074d7779322c8720f346b5.tar.xz
pci: layerscape: add pci driver based on DM
There are more than five kinds of Layerscape SoCs. unfortunately, PCIe controller of each SoC is a little bit different. In order to avoid too many macro definitions, the patch addes a new implementation of PCIe driver based on DM. PCIe dts node is used to describe the difference. Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'drivers/pci/Kconfig')
-rw-r--r--drivers/pci/Kconfig8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index 275b29bc32..692a398503 100644
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -71,4 +71,12 @@ config PCI_XILINX
Enable support for the Xilinx AXI bridge for PCI express, an IP block
which can be used on some generations of Xilinx FPGAs.
+config PCIE_LAYERSCAPE
+ bool "Layerscape PCIe support"
+ depends on DM_PCI
+ help
+ Support Layerscape PCIe. The Layerscape SoC may have one or several
+ PCIe controllers. The PCIe may works in RC or EP mode according to
+ RCW[HOST_AGT_PEX] setting.
+
endif