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authorMinghuan Lian <Minghuan.Lian@nxp.com>2017-10-20 05:45:50 +0300
committerTom Rini <trini@konsulko.com>2017-11-17 18:53:45 +0300
commit3977dcd559e392b9a2f3c69e317527cbe8b6ae15 (patch)
tree84c91000d21dcce79230b794f25296591157a463 /drivers/pci/pci_auto.c
parent9587dee937bcedc07d06af4aafd4361c8c200023 (diff)
downloadu-boot-3977dcd559e392b9a2f3c69e317527cbe8b6ae15.tar.xz
dm: pci: change bus number register setting compliant with Linux
This patch is to change U-Boot PCI bus assignement compliant with Linux. It means each PCIe controller's bus number is 0, not the current maximum PCI bus number, when start to scan this controller. Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'drivers/pci/pci_auto.c')
-rw-r--r--drivers/pci/pci_auto.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c
index ee9a854bda..c2bc32678a 100644
--- a/drivers/pci/pci_auto.c
+++ b/drivers/pci/pci_auto.c
@@ -181,8 +181,8 @@ void dm_pciauto_prescan_setup_bridge(struct udevice *dev, int sub_bus)
/* Configure bus number registers */
dm_pci_write_config8(dev, PCI_PRIMARY_BUS,
- PCI_BUS(dm_pci_get_bdf(dev)));
- dm_pci_write_config8(dev, PCI_SECONDARY_BUS, sub_bus);
+ PCI_BUS(dm_pci_get_bdf(dev)) - ctlr->seq);
+ dm_pci_write_config8(dev, PCI_SECONDARY_BUS, sub_bus - ctlr->seq);
dm_pci_write_config8(dev, PCI_SUBORDINATE_BUS, 0xff);
if (pci_mem) {
@@ -257,7 +257,7 @@ void dm_pciauto_postscan_setup_bridge(struct udevice *dev, int sub_bus)
pci_io = ctlr_hose->pci_io;
/* Configure bus number registers */
- dm_pci_write_config8(dev, PCI_SUBORDINATE_BUS, sub_bus);
+ dm_pci_write_config8(dev, PCI_SUBORDINATE_BUS, sub_bus - ctlr->seq);
if (pci_mem) {
/* Round memory allocator to 1MB boundary */