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authorTuomas Tynkkynen <tuomas.tynkkynen@iki.fi>2017-09-19 23:18:04 +0300
committerTom Rini <trini@konsulko.com>2017-10-06 18:27:41 +0300
commit75e3feac1bd707f205705d8e8d233db4c2e752fd (patch)
tree5cfcff23d9b8c4a97e81d6b2282847153a59fcc4 /drivers/pci
parentbadb99220a42f88bc823c884e487657bfe734a4d (diff)
downloadu-boot-75e3feac1bd707f205705d8e8d233db4c2e752fd.tar.xz
pci: xilinx: Use pci_generic_mmap_{read, write}_config()
Use the new helper function to avoid boilerplate in the driver. Note that this changes __raw_writel et al. to writel. AFAICT this is no problem because: - The Linux driver for the same hardware uses the non-__raw variants as well (via pci_generic_config_write()). - This driver seems to be used only on MIPS so far, where the __raw and non-__raw accessors are the same. Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'drivers/pci')
-rw-r--r--drivers/pci/pcie_xilinx.c53
1 files changed, 7 insertions, 46 deletions
diff --git a/drivers/pci/pcie_xilinx.c b/drivers/pci/pcie_xilinx.c
index 6425825068..57112f5333 100644
--- a/drivers/pci/pcie_xilinx.c
+++ b/drivers/pci/pcie_xilinx.c
@@ -41,7 +41,7 @@ static bool pcie_xilinx_link_up(struct xilinx_pcie *pcie)
/**
* pcie_xilinx_config_address() - Calculate the address of a config access
- * @pcie: Pointer to the PCI controller state
+ * @udev: Pointer to the PCI bus
* @bdf: Identifies the PCIe device to access
* @offset: The offset into the device's configuration space
* @paddress: Pointer to the pointer to write the calculates address to
@@ -55,9 +55,10 @@ static bool pcie_xilinx_link_up(struct xilinx_pcie *pcie)
*
* Return: 0 on success, else -ENODEV
*/
-static int pcie_xilinx_config_address(struct xilinx_pcie *pcie, pci_dev_t bdf,
+static int pcie_xilinx_config_address(struct udevice *udev, pci_dev_t bdf,
uint offset, void **paddress)
{
+ struct xilinx_pcie *pcie = dev_get_priv(udev);
unsigned int bus = PCI_BUS(bdf);
unsigned int dev = PCI_DEV(bdf);
unsigned int func = PCI_FUNC(bdf);
@@ -101,29 +102,8 @@ static int pcie_xilinx_read_config(struct udevice *bus, pci_dev_t bdf,
uint offset, ulong *valuep,
enum pci_size_t size)
{
- struct xilinx_pcie *pcie = dev_get_priv(bus);
- void *address;
- int err;
-
- err = pcie_xilinx_config_address(pcie, bdf, offset, &address);
- if (err < 0) {
- *valuep = pci_get_ff(size);
- return 0;
- }
-
- switch (size) {
- case PCI_SIZE_8:
- *valuep = __raw_readb(address);
- return 0;
- case PCI_SIZE_16:
- *valuep = __raw_readw(address);
- return 0;
- case PCI_SIZE_32:
- *valuep = __raw_readl(address);
- return 0;
- default:
- return -EINVAL;
- }
+ return pci_generic_mmap_read_config(bus, pcie_xilinx_config_address,
+ bdf, offset, valuep, size);
}
/**
@@ -144,27 +124,8 @@ static int pcie_xilinx_write_config(struct udevice *bus, pci_dev_t bdf,
uint offset, ulong value,
enum pci_size_t size)
{
- struct xilinx_pcie *pcie = dev_get_priv(bus);
- void *address;
- int err;
-
- err = pcie_xilinx_config_address(pcie, bdf, offset, &address);
- if (err < 0)
- return 0;
-
- switch (size) {
- case PCI_SIZE_8:
- __raw_writeb(value, address);
- return 0;
- case PCI_SIZE_16:
- __raw_writew(value, address);
- return 0;
- case PCI_SIZE_32:
- __raw_writel(value, address);
- return 0;
- default:
- return -EINVAL;
- }
+ return pci_generic_mmap_write_config(bus, pcie_xilinx_config_address,
+ bdf, offset, value, size);
}
/**