diff options
| author | Hou Zhiqiang <Zhiqiang.Hou@nxp.com> | 2020-07-09 18:31:42 +0300 |
|---|---|---|
| committer | Priyanka Jain <priyanka.jain@nxp.com> | 2020-07-27 11:54:15 +0300 |
| commit | ed188aa88686f2af1025ebe102a6e1be137b85bc (patch) | |
| tree | 0335523e45d7b49acf257f82300477f069a1650b /drivers/pci | |
| parent | 4085e3a46a86c10398ceb29e7a90f9345bc85b16 (diff) | |
| download | u-boot-ed188aa88686f2af1025ebe102a6e1be137b85bc.tar.xz | |
pci: layerscape: Add specific config entry for RC and EP mode driver
Add Root Complex and Endpoint mode specific config entries, such that
it's feasible to enable the RC and/or EP mode driver indepently.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Diffstat (limited to 'drivers/pci')
| -rw-r--r-- | drivers/pci/Kconfig | 29 | ||||
| -rw-r--r-- | drivers/pci/Makefile | 7 |
2 files changed, 28 insertions, 8 deletions
diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig index ff974e5d74..91065e67f1 100644 --- a/drivers/pci/Kconfig +++ b/drivers/pci/Kconfig @@ -128,12 +128,29 @@ config PCI_XILINX which can be used on some generations of Xilinx FPGAs. config PCIE_LAYERSCAPE - bool "Layerscape PCIe support" + bool + default n + +config PCIE_LAYERSCAPE_RC + bool "Layerscape PCIe Root Complex mode support" + depends on DM_PCI + select PCIE_LAYERSCAPE + help + Enable Layerscape PCIe Root Complex mode driver support. The Layerscape + SoC may have one or several PCIe controllers. Each controller can be + configured to Root Complex mode by clearing the corresponding bit of + RCW[HOST_AGT_PEX]. + +config PCIE_LAYERSCAPE_EP + bool "Layerscape PCIe Endpoint mode support" depends on DM_PCI + select PCIE_LAYERSCAPE + select PCI_ENDPOINT help - Support Layerscape PCIe. The Layerscape SoC may have one or several - PCIe controllers. The PCIe may works in RC or EP mode according to - RCW[HOST_AGT_PEX] setting. + Enable Layerscape PCIe Endpoint mode driver support. The Layerscape + SoC may have one or several PCIe controllers. Each controller can be + configured to Endpoint mode by setting the corresponding bit of + RCW[HOST_AGT_PEX]. config PCIE_LAYERSCAPE_GEN4 bool "Layerscape Gen4 PCIe support" @@ -145,7 +162,7 @@ config PCIE_LAYERSCAPE_GEN4 config FSL_PCIE_COMPAT string "PCIe compatible of Kernel DT" - depends on PCIE_LAYERSCAPE || PCIE_LAYERSCAPE_GEN4 + depends on PCIE_LAYERSCAPE_RC || PCIE_LAYERSCAPE_GEN4 default "fsl,ls1012a-pcie" if ARCH_LS1012A default "fsl,ls1028a-pcie" if ARCH_LS1028A default "fsl,ls1043a-pcie" if ARCH_LS1043A @@ -160,7 +177,7 @@ config FSL_PCIE_COMPAT config FSL_PCIE_EP_COMPAT string "PCIe EP compatible of Kernel DT" - depends on PCIE_LAYERSCAPE || PCIE_LAYERSCAPE_GEN4 + depends on PCIE_LAYERSCAPE_RC || PCIE_LAYERSCAPE_GEN4 default "fsl,lx2160a-pcie-ep" if ARCH_LX2160A default "fsl,ls-pcie-ep" help diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile index bb95d26173..9faebffa48 100644 --- a/drivers/pci/Makefile +++ b/drivers/pci/Makefile @@ -33,8 +33,11 @@ obj-$(CONFIG_PCI_TEGRA) += pci_tegra.o obj-$(CONFIG_PCI_AARDVARK) += pci-aardvark.o obj-$(CONFIG_PCIE_DW_MVEBU) += pcie_dw_mvebu.o obj-$(CONFIG_PCIE_FSL) += pcie_fsl.o pcie_fsl_fixup.o -obj-$(CONFIG_PCIE_LAYERSCAPE) += pcie_layerscape.o pcie_layerscape_rc.o pcie_layerscape_ep.o -obj-$(CONFIG_PCIE_LAYERSCAPE) += pcie_layerscape_fixup.o pcie_layerscape_fixup_common.o +obj-$(CONFIG_PCIE_LAYERSCAPE) += pcie_layerscape.o +obj-$(CONFIG_PCIE_LAYERSCAPE_RC) += pcie_layerscape_rc.o \ + pcie_layerscape_fixup.o \ + pcie_layerscape_fixup_common.o +obj-$(CONFIG_PCIE_LAYERSCAPE_EP) += pcie_layerscape_ep.o obj-$(CONFIG_PCIE_LAYERSCAPE_GEN4) += pcie_layerscape_gen4.o \ pcie_layerscape_gen4_fixup.o \ pcie_layerscape_fixup_common.o |