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| author | Shawn Lin <shawn.lin@rock-chips.com> | 2021-01-15 13:01:22 +0300 |
|---|---|---|
| committer | Kever Yang <kever.yang@rock-chips.com> | 2021-01-21 07:00:45 +0300 |
| commit | 9ddc0787bd660214366e386ce689dd78299ac9d0 (patch) | |
| tree | d5c221ee858f00d561ea2e14d0a03f1a7b710248 /drivers/phy | |
| parent | 6ec62b6ca6986196d733383e628e7f5618f4cdd1 (diff) | |
| download | u-boot-9ddc0787bd660214366e386ce689dd78299ac9d0.tar.xz | |
pci: Add Rockchip dwc based PCIe controller driver
Add Rockchip dwc based PCIe controller driver for rk356x platform.
Driver support Gen3 by operating as a Root complex.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
Diffstat (limited to 'drivers/phy')
| -rw-r--r-- | drivers/phy/rockchip/Kconfig | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/phy/rockchip/Kconfig b/drivers/phy/rockchip/Kconfig index b794cdaf6a..e477a6cd9e 100644 --- a/drivers/phy/rockchip/Kconfig +++ b/drivers/phy/rockchip/Kconfig @@ -23,6 +23,9 @@ config PHY_ROCKCHIP_SNPS_PCIE3 depends on PHY && ARCH_ROCKCHIP help Support for Rockchip PCIe3 PHY with Synopsys IP block. + It could support PCIe Gen3 single root complex, and could + also be able splited into multiple combinations of lanes. + config PHY_ROCKCHIP_TYPEC bool "Rockchip TYPEC PHY Driver" |