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authorMarek Vasut <marek.vasut+renesas@gmail.com>2019-05-04 15:17:10 +0300
committerMarek Vasut <marex@denx.de>2019-05-07 06:41:32 +0300
commitcbde9dea09e807777a20ee8df9eb862aa03142d1 (patch)
treebab235d8f084ccbf8ecd77fb67487d027dc6400a /drivers/pinctrl/renesas/Kconfig
parent86b8e7d61a82deb660bc7cff2d4812a1740f6d15 (diff)
downloadu-boot-cbde9dea09e807777a20ee8df9eb862aa03142d1.tar.xz
pinctrl: renesas: Add RZ/A1 R7S72100 pin control driver
Add pin control driver for RZ/A1 SoC. The IP is very different from the R-Car Gen2/Gen3 one already present in the tree, hence a custom driver. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Diffstat (limited to 'drivers/pinctrl/renesas/Kconfig')
-rw-r--r--drivers/pinctrl/renesas/Kconfig12
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/pinctrl/renesas/Kconfig b/drivers/pinctrl/renesas/Kconfig
index 152414ce31..0ffd7fcfd4 100644
--- a/drivers/pinctrl/renesas/Kconfig
+++ b/drivers/pinctrl/renesas/Kconfig
@@ -3,6 +3,7 @@ if ARCH_RMOBILE
config PINCTRL_PFC
bool "Renesas pin control drivers"
depends on DM && ARCH_RMOBILE
+ default n if CPU_RZA1
help
Enable support for clock present on Renesas RCar SoCs.
@@ -116,4 +117,15 @@ config PINCTRL_PFC_R8A77995
the GPIO definitions and pin control functions for each available
multiplex function.
+config PINCTRL_PFC_R7S72100
+ bool "Renesas RZ/A1 R7S72100 pin control driver"
+ depends on CPU_RZA1
+ default y if CPU_RZA1
+ help
+ Support pin multiplexing control on Renesas RZ/A1 R7S72100 SoCs.
+
+ The driver is controlled by a device tree node which contains both
+ the GPIO definitions and pin control functions for each available
+ multiplex function.
+
endif