diff options
| author | Simon South <simon@simonsouth.net> | 2019-10-06 19:28:13 +0300 |
|---|---|---|
| committer | Kever Yang <kever.yang@rock-chips.com> | 2019-11-10 15:40:20 +0300 |
| commit | 18c24c11778c0571b6b559c02d1d58d65a8e44c1 (patch) | |
| tree | f9164d4e8a436799208ec99cdb012322243bcad8 /drivers/ram/rockchip | |
| parent | b5500b20576e8e786d74d92549ca66d31c92b0d9 (diff) | |
| download | u-boot-18c24c11778c0571b6b559c02d1d58d65a8e44c1.tar.xz | |
ram: rk3328: Use correct frequency units in function
Fix a pair of tests in phy_dll_bypass_set() that used incorrect units
for the DDR frequency, causing the DRAM controller to be misconfigured
in most cases.
Signed-off-by: Simon South <simon@simonsouth.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Diffstat (limited to 'drivers/ram/rockchip')
| -rw-r--r-- | drivers/ram/rockchip/sdram_rk3328.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/ram/rockchip/sdram_rk3328.c b/drivers/ram/rockchip/sdram_rk3328.c index 656696ac3c..0541bbadf0 100644 --- a/drivers/ram/rockchip/sdram_rk3328.c +++ b/drivers/ram/rockchip/sdram_rk3328.c @@ -311,12 +311,12 @@ static void phy_dll_bypass_set(struct dram_info *dram, u32 freq) setbits_le32(PHY_REG(phy_base, 0x56), 1 << 4); clrbits_le32(PHY_REG(phy_base, 0x57), 1 << 3); - if (freq <= (400 * MHz)) + if (freq <= 400) /* DLL bypass */ setbits_le32(PHY_REG(phy_base, 0xa4), 0x1f); else clrbits_le32(PHY_REG(phy_base, 0xa4), 0x1f); - if (freq <= (680 * MHz)) + if (freq <= 680) tmp = 2; else tmp = 1; |