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author | Bin Meng <bin.meng@windriver.com> | 2020-09-15 11:05:06 +0300 |
---|---|---|
committer | Andes <uboot@andestech.com> | 2020-09-30 03:54:38 +0300 |
commit | f8c9660bfe17100a27ca4cf28f957a25cb420255 (patch) | |
tree | b0826e85ac75bfaa0b245daa56d199d1b9b321be /drivers/ram/sifive | |
parent | 08bff30d5d15ddeb1da82d112b8b98d1cac06889 (diff) | |
download | u-boot-f8c9660bfe17100a27ca4cf28f957a25cb420255.tar.xz |
ram: sifive: Check return value on clk_enable()
The return value should be checked otherwise it's useless to
assign the return value to 'ret'.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Diffstat (limited to 'drivers/ram/sifive')
-rw-r--r-- | drivers/ram/sifive/fu540_ddr.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/ram/sifive/fu540_ddr.c b/drivers/ram/sifive/fu540_ddr.c index 5ff88692a8..f5b2873b33 100644 --- a/drivers/ram/sifive/fu540_ddr.c +++ b/drivers/ram/sifive/fu540_ddr.c @@ -369,6 +369,11 @@ static int fu540_ddr_probe(struct udevice *dev) } ret = clk_enable(&priv->ddr_clk); + if (ret < 0) { + debug("Could not enable DDR clock\n"); + return ret; + } + priv->ctl = regmap_get_range(map, 0); priv->phy = regmap_get_range(map, 1); priv->physical_filter_ctrl = regmap_get_range(map, 2); |