summaryrefslogtreecommitdiff
path: root/drivers/ram/starfive/ddrphy_train.c
diff options
context:
space:
mode:
authorandy.hu <andy.hu@starfivetech.com>2023-07-20 06:27:38 +0300
committerandy.hu <andy.hu@starfivetech.com>2023-07-20 06:27:38 +0300
commit24704a41a89784c2d25d1a76b2ed792f768d9fe2 (patch)
tree5089998600d38a18aa02388da425211e81c78fd5 /drivers/ram/starfive/ddrphy_train.c
parentd45b8fdc099f7f293ee6f51963fa8028b38e6999 (diff)
parent1539d6e71eed3c2ad420ae4344ae7d37226b3ec5 (diff)
downloadu-boot-24704a41a89784c2d25d1a76b2ed792f768d9fe2.tar.xz
Merge branch 'CR_6604_1G_DDR_SYNC_samin.guo' into 'jh7110-master'
CR6604:dram: jh7110: sync from devkits/vf2 See merge request sdk/u-boot!59
Diffstat (limited to 'drivers/ram/starfive/ddrphy_train.c')
-rw-r--r--drivers/ram/starfive/ddrphy_train.c390
1 files changed, 387 insertions, 3 deletions
diff --git a/drivers/ram/starfive/ddrphy_train.c b/drivers/ram/starfive/ddrphy_train.c
index 6383a42126..a28517dd07 100644
--- a/drivers/ram/starfive/ddrphy_train.c
+++ b/drivers/ram/starfive/ddrphy_train.c
@@ -8,7 +8,376 @@
#include <common.h>
#include <asm/io.h>
-static u32 ddr_train_data[] = {
+#include "starfive_ddr.h"
+
+static u32 ddr4_train_data[] = {
+ 0xa00,
+ 0x101,
+ 0x640000,
+ 0x1,
+ 0x0,
+ 0x0,
+ 0x0,
+ 0x0,
+ 0x1,
+ 0x7,
+ 0x10000,
+ 0x10003,
+ 0x1,
+ 0x5,
+ 0x0,
+ 0x0,
+ 0x0,
+ 0x0,
+ 0x0,
+ 0x0,
+ 0x0,
+ 0x0,
+ 0x0,
+ 0x0,
+ 0x280d0000,
+ 0x0,
+ 0x1,
+ 0x32000003,
+ 0x0,
+ 0x0,
+ 0x60602,
+ 0x1,
+ 0x0,
+ 0x0,
+ 0x0,
+ 0x55,
+ 0xaa,
+ 0xad,
+ 0x52,
+ 0x6a,
+ 0x95,
+ 0x95,
+ 0xad,
+ 0x1000000,
+ 0x1000000,
+ 0x0,
+ 0x3030000,
+ 0x14,
+ 0x7d0,
+ 0x300,
+ 0x0,
+ 0x0,
+ 0x1000000,
+ 0x10101,
+ 0x0,
+ 0x30000,
+ 0x10100,
+ 0x1703,
+ 0x0,
+ 0x0,
+ 0x0,
+ 0xa140a01,
+ 0x204010a,
+ 0x2080510,
+ 0x40400,
+ 0x101,
+ 0x10100,
+ 0x2040300,
+ 0x34000000,
+ 0x0,
+ 0x0,
+ 0x1000000,
+ 0x0,
+ 0x0,
+ 0x0,
+ 0x6,
+ 0x100,
+ 0x40000,
+ 0x2000200,
+ 0x1000100,
+ 0x1000000,
+ 0x2000200,
+ 0x200,
+ 0x0,
+ 0x0,
+ 0x0,
+ 0xe000003,
+ 0xc0d100f,
+ 0xa09080b,
+ 0x2010000,
+ 0x80103,
+ 0x10200,
+ 0x0,
+ 0x3000000,
+ 0xd6,
+ 0x216,
+ 0x0,
+ 0x0,
+ 0x0,
+ 0x0,
+ 0x0,
+ 0x0,
+ 0x0,
+ 0x30100,
+ 0x1010001,
+ 0x10200,
+ 0x4000103,
+ 0x1050001,
+ 0x10600,
+ 0x107,
+ 0x0,
+ 0x0,
+ 0x10000,
+ 0x0,
+ 0x0,
+ 0x0,
+ 0x0,
+ 0x10000,
+ 0x4,
+ 0x0,
+ 0x0,
+ 0x0,
+ 0xa000a0,
+ 0x1a1a00a0,
+ 0x1a,
+ 0x35,
+ 0x35,
+ 0x40035,
+ 0x4000400,
+ 0xca04000b,
+ 0x4000b20,
+ 0xb20ca,
+ 0x20ca04,
+ 0x24b,
+ 0x207b,
+ 0x24b,
+ 0x207b,
+ 0x24b,
+ 0x400207b,
+ 0x1010404,
+ 0x1801,
+ 0x180018,
+ 0x10e010e,
+ 0x10e,
+ 0x0,
+ 0x5000000,
+ 0x1010505,
+ 0x1010101,
+ 0x191919,
+ 0x0,
+ 0x0,
+ 0x11000000,
+ 0xc0c1111,
+ 0x303030c,
+ 0xc0034,
+ 0xc0034,
+ 0xc0034,
+ 0x0,
+ 0x0,
+ 0xa,
+ 0xa,
+ 0x100000a,
+ 0x0,
+ 0x100,
+ 0x1000000,
+ 0x0,
+ 0x1e1a1e1a,
+ 0x1011e1a,
+ 0x100b0801,
+ 0x100b080f,
+ 0x100b080f,
+ 0xc00f,
+ 0xc01000,
+ 0xc01000,
+ 0x191000,
+ 0x19010b,
+ 0x19010b,
+ 0x101010b,
+ 0x1f01,
+ 0x1e1a0055,
+ 0x7000001,
+ 0x1f0c11,
+ 0x1e1a0055,
+ 0x7000001,
+ 0x1f0c11,
+ 0x1e1a0055,
+ 0x7000001,
+ 0xc11,
+ 0xf0f0800,
+ 0x100806,
+ 0x2301071c,
+ 0x8002000,
+ 0x1d1d190b,
+ 0x60f0f08,
+ 0x1008,
+ 0x2301071c,
+ 0x8002000,
+ 0x1d1d190b,
+ 0x60f0f08,
+ 0x1008,
+ 0x2301071c,
+ 0x8002000,
+ 0x1d1d190b,
+ 0x40f6,
+ 0x2899c,
+ 0x40f6,
+ 0x2899c,
+ 0x40f6,
+ 0x2899c,
+ 0x3000300,
+ 0x3030300,
+ 0x30003,
+ 0x3000300,
+ 0xb,
+ 0x0,
+ 0x0,
+ 0x0,
+ 0x256,
+ 0xb,
+ 0x0,
+ 0x0,
+ 0x0,
+ 0x256,
+ 0xb,
+ 0x0,
+ 0x0,
+ 0x0,
+ 0x2000256,
+ 0x80,
+ 0x20000,
+ 0x80,
+ 0x20000,
+ 0x80,
+ 0x0,
+ 0x0,
+ 0x2020202,
+ 0x2040108,
+ 0x8010402,
+ 0x67676767,
+ 0x67676767,
+ 0x67676767,
+ 0x67676767,
+ 0x1010101,
+ 0x0,
+ 0x0,
+ 0x0,
+ 0x0,
+ 0x5500,
+ 0x5a00,
+ 0x55003c,
+ 0x0,
+ 0x3c00005a,
+ 0x5500,
+ 0x5a00,
+ 0x55003c,
+ 0x0,
+ 0x3c00005a,
+ 0x18171615,
+ 0x14131211,
+ 0x7060504,
+ 0x3020100,
+ 0x0,
+ 0x0,
+ 0x0,
+ 0x1000000,
+ 0x4020201,
+ 0x80804,
+ 0x634,
+ 0x201,
+ 0x10,
+ 0x200,
+ 0x0,
+ 0x481,
+ 0x800,
+ 0x4d4d,
+ 0x634,
+ 0x201,
+ 0x10,
+ 0x200,
+ 0x0,
+ 0x481,
+ 0x800,
+ 0x4d4d,
+ 0x634,
+ 0x201,
+ 0x10,
+ 0x200,
+ 0x0,
+ 0x481,
+ 0x800,
+ 0x4d4d,
+ 0x634,
+ 0x201,
+ 0x10,
+ 0x200,
+ 0x0,
+ 0x481,
+ 0x800,
+ 0x4d4d,
+ 0x634,
+ 0x201,
+ 0x10,
+ 0x200,
+ 0x0,
+ 0x481,
+ 0x800,
+ 0x4d4d,
+ 0x634,
+ 0x201,
+ 0x10,
+ 0x200,
+ 0x0,
+ 0x481,
+ 0x800,
+ 0x4d4d,
+ 0x634,
+ 0x201,
+ 0x10,
+ 0x200,
+ 0x0,
+ 0x481,
+ 0x800,
+ 0x4d4d,
+ 0x634,
+ 0x201,
+ 0x10,
+ 0x200,
+ 0x0,
+ 0x481,
+ 0x800,
+ 0x4d4d,
+ 0x634,
+ 0x201,
+ 0x10,
+ 0x200,
+ 0x0,
+ 0x481,
+ 0x800,
+ 0x4d4d,
+ 0x634,
+ 0x201,
+ 0x10,
+ 0x200,
+ 0x0,
+ 0x481,
+ 0x800,
+ 0x4d4d,
+ 0x634,
+ 0x201,
+ 0x10,
+ 0x200,
+ 0x0,
+ 0x481,
+ 0x800,
+ 0x4d4d,
+ 0x634,
+ 0x201,
+ 0x10,
+ 0x200,
+ 0x0,
+ 0x481,
+ 0x800,
+ 0x4d4d,
+
+};
+
+static u32 lpddr4_train_data[] = {
0xb00,
0x101,
0x640000,
@@ -377,9 +746,24 @@ static u32 ddr_train_data[] = {
void ddr_phy_train(u32 *phyreg)
{
u32 i, len;
+ u32 *data;
+
+ switch (starfive_ddr_type) {
+ case DDR_TYPE_DDR4:
+ len = sizeof(ddr4_train_data) / sizeof(u32);
+ data = ddr4_train_data;
+ break;
+ case DDR_TYPE_LPDDR4:
+ len = sizeof(lpddr4_train_data) / sizeof(u32);
+ data = lpddr4_train_data;
+ break;
+ case DDR_TYPE_LPDDR3:
+ case DDR_TYPE_DDR3:
+ default:
+ return;
+ }
- len = sizeof(ddr_train_data) / sizeof(u32);
for (i = 0; i < len; i++)
- out_le32(phyreg + i, ddr_train_data[i]);
+ out_le32(phyreg + i, data[i]);
}