diff options
| author | Jagan Teki <jagan@amarulasolutions.com> | 2019-07-16 14:56:49 +0300 |
|---|---|---|
| committer | Kever Yang <kever.yang@rock-chips.com> | 2019-07-20 18:59:44 +0300 |
| commit | 879f9fed6a695a75f558c874813c974d1c1d3658 (patch) | |
| tree | 36eb2ff4c0a793bec985171f7a19c5f7051f7b56 /drivers/ram | |
| parent | a9191b8eeccaf99f77290f8389a22bf253a06409 (diff) | |
| download | u-boot-879f9fed6a695a75f558c874813c974d1c1d3658.tar.xz | |
ram: rk3399: Simply existing dram enc macro
Add simplified and meaningful macro for all setting.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
(Squash the similar patches into 1 patch)
Signed-off-by: Kever Yang <Kever.yang@rock-chips.com>
Diffstat (limited to 'drivers/ram')
| -rw-r--r-- | drivers/ram/rockchip/sdram_rk3399.c | 30 |
1 files changed, 11 insertions, 19 deletions
diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c index c59c985c19..9bd163fa48 100644 --- a/drivers/ram/rockchip/sdram_rk3399.c +++ b/drivers/ram/rockchip/sdram_rk3399.c @@ -1076,8 +1076,8 @@ static void dram_all_config(struct dram_info *dram, u32 sys_reg = 0; unsigned int channel, idx; - sys_reg |= params->base.dramtype << SYS_REG_DDRTYPE_SHIFT; - sys_reg |= (params->base.num_channels - 1) << SYS_REG_NUM_CH_SHIFT; + sys_reg |= SYS_REG_ENC_DDRTYPE(params->base.dramtype); + sys_reg |= SYS_REG_ENC_NUM_CH(params->base.num_channels); for (channel = 0, idx = 0; (idx < params->base.num_channels) && (channel < 2); @@ -1089,23 +1089,15 @@ static void dram_all_config(struct dram_info *dram, if (params->ch[channel].cap_info.col == 0) continue; idx++; - sys_reg |= info->cap_info.row_3_4 << - SYS_REG_ROW_3_4_SHIFT(channel); - sys_reg |= 1 << SYS_REG_CHINFO_SHIFT(channel); - sys_reg |= (info->cap_info.rank - 1) << - SYS_REG_RANK_SHIFT(channel); - sys_reg |= (info->cap_info.col - 9) << - SYS_REG_COL_SHIFT(channel); - sys_reg |= info->cap_info.bk == 3 ? 0 : 1 << - SYS_REG_BK_SHIFT(channel); - sys_reg |= (info->cap_info.cs0_row - 13) << - SYS_REG_CS0_ROW_SHIFT(channel); - sys_reg |= (info->cap_info.cs1_row - 13) << - SYS_REG_CS1_ROW_SHIFT(channel); - sys_reg |= (2 >> info->cap_info.bw) << - SYS_REG_BW_SHIFT(channel); - sys_reg |= (2 >> info->cap_info.dbw) << - SYS_REG_DBW_SHIFT(channel); + sys_reg |= SYS_REG_ENC_ROW_3_4(info->cap_info.row_3_4, channel); + sys_reg |= SYS_REG_ENC_CHINFO(channel); + sys_reg |= SYS_REG_ENC_RANK(info->cap_info.rank, channel); + sys_reg |= SYS_REG_ENC_COL(info->cap_info.col, channel); + sys_reg |= SYS_REG_ENC_BK(info->cap_info.bk, channel); + sys_reg |= SYS_REG_ENC_CS0_ROW(info->cap_info.cs0_row, channel); + sys_reg |= SYS_REG_ENC_CS1_ROW(info->cap_info.cs1_row, channel); + sys_reg |= SYS_REG_ENC_BW(info->cap_info.bw, channel); + sys_reg |= SYS_REG_ENC_DBW(info->cap_info.dbw, channel); ddr_msch_regs = dram->chan[channel].msch; noc_timing = ¶ms->ch[channel].noc_timings; |