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authorPatrick Delaunay <patrick.delaunay@foss.st.com>2021-10-11 10:52:50 +0300
committerPatrice Chotard <patrice.chotard@foss.st.com>2021-11-10 19:07:31 +0300
commitf42045b2e75036330741c3fd3a1b5ca64867aaa0 (patch)
treea227d4c2c942ff3cf531fd919cd2ec5df93ee203 /drivers/ram
parent17aeb589fa9ddb70acaef069732746c4d8fb4021 (diff)
downloadu-boot-f42045b2e75036330741c3fd3a1b5ca64867aaa0.tar.xz
stm32mp15: replace CONFIG_TFABOOT when it is possible
In some part of STM32MP15 support the CONFIG_TFABOOT can be replaced by other config: CONFIG_ARMV7_PSCI and CONFIG_ARM_SMCCC. This patch also simplifies the code in cpu.c, stm32mp1_ram.c and clk_stml32mp1.c as execution of U-Boot in sysram (boot without SPL and without TFA) is not supported: the associated initialization code is present only in SPL. This cleanup patch is a preliminary step to support SPL load of OP-TEE in secure world, with SPL in secure world and U-Boot in no-secure world. Reported-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Diffstat (limited to 'drivers/ram')
-rw-r--r--drivers/ram/stm32mp1/stm32mp1_ram.c13
1 files changed, 6 insertions, 7 deletions
diff --git a/drivers/ram/stm32mp1/stm32mp1_ram.c b/drivers/ram/stm32mp1/stm32mp1_ram.c
index 26f0b4f1ea..98fa1f4f11 100644
--- a/drivers/ram/stm32mp1/stm32mp1_ram.c
+++ b/drivers/ram/stm32mp1/stm32mp1_ram.c
@@ -202,17 +202,16 @@ static int stm32mp1_ddr_probe(struct udevice *dev)
priv->info.base = STM32_DDR_BASE;
-#if !defined(CONFIG_TFABOOT) && \
- (!defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD))
- priv->info.size = 0;
- ret = stm32mp1_ddr_setup(dev);
+ if (IS_ENABLED(CONFIG_SPL_BUILD)) {
+ priv->info.size = 0;
+ ret = stm32mp1_ddr_setup(dev);
+
+ return log_ret(ret);
+ }
- return log_ret(ret);
-#else
ofnode node = stm32mp1_ddr_get_ofnode(dev);
priv->info.size = ofnode_read_u32_default(node, "st,mem-size", 0);
return 0;
-#endif
}
static int stm32mp1_ddr_get_info(struct udevice *dev, struct ram_info *info)