diff options
| author | Jagan Teki <jagan@amarulasolutions.com> | 2022-12-14 20:50:48 +0300 |
|---|---|---|
| committer | Kever Yang <kever.yang@rock-chips.com> | 2023-01-16 13:01:10 +0300 |
| commit | 26f92be07e2a0e380a67c88a53911a10422d9855 (patch) | |
| tree | cb1e9586e4b82f65526d11c30b75d62d79b7dd01 /drivers/ram | |
| parent | 78276c531321ef989ae8d9d83144fb0ddd45962f (diff) | |
| download | u-boot-26f92be07e2a0e380a67c88a53911a10422d9855.tar.xz | |
ram: rockchip: Add common ddr type configs
We have common ddr types in rockchip or in general. So use
the common ddr type names instead of per Rockchip SoC to
avoid confusion.
The respective ddr type names will use on the associated
ddr SoC driver as these drivers are built per SoC at a time.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Diffstat (limited to 'drivers/ram')
| -rw-r--r-- | drivers/ram/rockchip/Kconfig | 32 | ||||
| -rw-r--r-- | drivers/ram/rockchip/sdram_px30.c | 6 | ||||
| -rw-r--r-- | drivers/ram/rockchip/sdram_rk3399.c | 7 |
3 files changed, 21 insertions, 24 deletions
diff --git a/drivers/ram/rockchip/Kconfig b/drivers/ram/rockchip/Kconfig index c29d5e8b38..67c63ecba0 100644 --- a/drivers/ram/rockchip/Kconfig +++ b/drivers/ram/rockchip/Kconfig @@ -11,9 +11,10 @@ config ROCKCHIP_SDRAM_COMMON help This enable sdram common driver +if RAM_ROCKCHIP + config RAM_ROCKCHIP_DEBUG bool "Rockchip ram drivers debugging" - depends on RAM_ROCKCHIP default y help This enables debugging ram driver API's for the platforms @@ -22,31 +23,28 @@ config RAM_ROCKCHIP_DEBUG This is an option for developers to understand the ram drivers initialization, configurations and etc. -config RAM_PX30_DDR4 - bool "DDR4 support for Rockchip PX30" - depends on RAM_ROCKCHIP && ROCKCHIP_PX30 +config RAM_ROCKCHIP_DDR4 + bool "DDR4 support for Rockchip SoCs" help This enables DDR4 sdram support instead of the default DDR3 support - on Rockchip PC30 SoCs. + on Rockchip SoCs. -config RAM_PX30_LPDDR2 - bool "LPDDR2 support for Rockchip PX30" - depends on RAM_ROCKCHIP && ROCKCHIP_PX30 +config RAM_ROCKCHIP_LPDDR2 + bool "LPDDR2 support for Rockchip SoCs" help This enables LPDDR2 sdram support instead of the default DDR3 support - on Rockchip PC30 SoCs. + on Rockchip SoCs. -config RAM_PX30_LPDDR3 - bool "LPDDR3 support for Rockchip PX30" - depends on RAM_ROCKCHIP && ROCKCHIP_PX30 +config RAM_ROCKCHIP_LPDDR3 + bool "LPDDR3 support for Rockchip SoCs" help This enables LPDDR3 sdram support instead of the default DDR3 support - on Rockchip PC30 SoCs. + on Rockchip SoCs. -config RAM_RK3399_LPDDR4 - bool "LPDDR4 support for Rockchip RK3399" - depends on RAM_ROCKCHIP && ROCKCHIP_RK3399 +config RAM_ROCKCHIP_LPDDR4 + bool "LPDDR4 support for Rockchip SoCs" help This enables LPDDR4 sdram code support for the platforms based - on Rockchip RK3399 SoC. + on Rockchip SoCs. +endif # RAM_ROCKCHIP diff --git a/drivers/ram/rockchip/sdram_px30.c b/drivers/ram/rockchip/sdram_px30.c index 98b2593ac4..86185149a9 100644 --- a/drivers/ram/rockchip/sdram_px30.c +++ b/drivers/ram/rockchip/sdram_px30.c @@ -125,11 +125,11 @@ u32 addrmap[][8] = { struct dram_info dram_info; struct px30_sdram_params sdram_configs[] = { -#if defined(CONFIG_RAM_PX30_DDR4) +#if defined(CONFIG_RAM_ROCKCHIP_DDR4) #include "sdram-px30-ddr4-detect-333.inc" -#elif defined(CONFIG_RAM_PX30_LPDDR2) +#elif defined(CONFIG_RAM_ROCKCHIP_LPDDR2) #include "sdram-px30-lpddr2-detect-333.inc" -#elif defined(CONFIG_RAM_PX30_LPDDR3) +#elif defined(CONFIG_RAM_ROCKCHIP_LPDDR3) #include "sdram-px30-lpddr3-detect-333.inc" #else #include "sdram-px30-ddr3-detect-333.inc" diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c index 136e4ede71..56fd863ca2 100644 --- a/drivers/ram/rockchip/sdram_rk3399.c +++ b/drivers/ram/rockchip/sdram_rk3399.c @@ -1625,7 +1625,7 @@ static void set_ddr_stride(struct rk3399_pmusgrf_regs *pmusgrf, u32 stride) rk_clrsetreg(&pmusgrf->soc_con4, 0x1f << 10, stride << 10); } -#if !defined(CONFIG_RAM_RK3399_LPDDR4) +#if !defined(CONFIG_RAM_ROCKCHIP_LPDDR4) static int data_training_first(struct dram_info *dram, u32 channel, u8 rank, struct rk3399_sdram_params *params) { @@ -2558,8 +2558,7 @@ static int lpddr4_set_rate(struct dram_info *dram, return 0; } - -#endif /* CONFIG_RAM_RK3399_LPDDR4 */ +#endif /* CONFIG_RAM_ROCKCHIP_LPDDR4 */ /* CS0,n=1 * CS1,n=2 @@ -3059,7 +3058,7 @@ static int conv_of_plat(struct udevice *dev) #endif static const struct sdram_rk3399_ops rk3399_ops = { -#if !defined(CONFIG_RAM_RK3399_LPDDR4) +#if !defined(CONFIG_RAM_ROCKCHIP_LPDDR4) .data_training_first = data_training_first, .set_rate_index = switch_to_phy_index1, .modify_param = modify_param, |