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| author | Tom Rini <trini@konsulko.com> | 2019-04-26 20:49:58 +0300 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2019-04-26 20:49:58 +0300 |
| commit | 1c64692df20c1f491ea79de3a732428611bb0ba0 (patch) | |
| tree | 4942ec36730d3ef59c3dbca39adb1228c9b98602 /drivers/rtc/m41t62.c | |
| parent | 7d994067424776b6184872b82fcaf4c0b95528f9 (diff) | |
| parent | bf068c7643f23c3f0936e3d1d292cc537acaf3bb (diff) | |
| download | u-boot-1c64692df20c1f491ea79de3a732428611bb0ba0.tar.xz | |
Merge branch 'master' of git://git.denx.de/u-boot-socfpga
Diffstat (limited to 'drivers/rtc/m41t62.c')
| -rw-r--r-- | drivers/rtc/m41t62.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/rtc/m41t62.c b/drivers/rtc/m41t62.c index 2ee7e00b02..6161b76712 100644 --- a/drivers/rtc/m41t62.c +++ b/drivers/rtc/m41t62.c @@ -155,6 +155,15 @@ static int m41t62_rtc_reset(struct udevice *dev) return ret; } +/* + * Make sure HT bit is cleared. This bit is set on entering battery backup + * mode, so do this before the first read access. + */ +static int m41t62_rtc_probe(struct udevice *dev) +{ + return m41t62_rtc_reset(dev); +} + static const struct rtc_ops m41t62_rtc_ops = { .get = m41t62_rtc_get, .set = m41t62_rtc_set, @@ -163,6 +172,7 @@ static const struct rtc_ops m41t62_rtc_ops = { static const struct udevice_id m41t62_rtc_ids[] = { { .compatible = "st,m41t62" }, + { .compatible = "st,m41t82" }, { .compatible = "microcrystal,rv4162" }, { } }; @@ -172,6 +182,7 @@ U_BOOT_DRIVER(rtc_m41t62) = { .id = UCLASS_RTC, .of_match = m41t62_rtc_ids, .ops = &m41t62_rtc_ops, + .probe = &m41t62_rtc_probe, }; #else /* NON DM RTC code - will be removed */ |