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| author | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2017-02-28 15:04:10 +0300 |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2017-04-10 05:02:03 +0300 |
| commit | c5f8dd482b4178cda30be7355085a70521cd4813 (patch) | |
| tree | 78a3baf00ff94a03e6bf4053a0449eb484fa31dd /drivers/serial/Makefile | |
| parent | ae5564d1aec8b39f55f283f8d187b7b1603533bf (diff) | |
| download | u-boot-c5f8dd482b4178cda30be7355085a70521cd4813.tar.xz | |
serial: Add serial driver for Intel MID
Add a specific serial driver for Intel MID platforms.
It has special fractional divider which can be programmed via UART_PS,
UART_MUL, and UART_DIV registers.
The UART clock is calculated as
UART clock = XTAL * UART_MUL / UART_DIV
The baudrate is calculated as
baud rate = UART clock / UART_PS / DLAB
Initialize fractional divider correctly for Intel Edison platform.
For backward compatibility we have to set initial DLAB value to 16
and speed to 115200 baud, where initial frequency is 29491200Hz, and
XTAL frequency is 38.4MHz.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Diffstat (limited to 'drivers/serial/Makefile')
| -rw-r--r-- | drivers/serial/Makefile | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index 8ba15ce028..4382cf9329 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -28,6 +28,7 @@ obj-$(CONFIG_S5P) += serial_s5p.o obj-$(CONFIG_MXC_UART) += serial_mxc.o obj-$(CONFIG_PXA_SERIAL) += serial_pxa.o obj-$(CONFIG_MESON_SERIAL) += serial_meson.o +obj-$(CONFIG_INTEL_MID_SERIAL) += serial_intel_mid.o ifdef CONFIG_SPL_BUILD obj-$(CONFIG_ROCKCHIP_SERIAL) += serial_rockchip.o endif |