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authorSean Anderson <seanga2@gmail.com>2020-10-17 01:57:49 +0300
committerJagan Teki <jagan@amarulasolutions.com>2020-12-18 13:46:37 +0300
commitddd3450f399051478263e823f5f778745824bdb3 (patch)
tree493ea84c7a13754af3a2eb69bf3054d4865d03dd /drivers/spi/designware_spi.c
parent934beab88248fa8e9a07f2f046427006156dca97 (diff)
downloadu-boot-ddd3450f399051478263e823f5f778745824bdb3.tar.xz
spi: dw: Rearrange struct dw_spi_priv
This should reduce the size of the struct, and also groups more similar fields together. Signed-off-by: Sean Anderson <seanga2@gmail.com> Tested-by Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Diffstat (limited to 'drivers/spi/designware_spi.c')
-rw-r--r--drivers/spi/designware_spi.c27
1 files changed, 13 insertions, 14 deletions
diff --git a/drivers/spi/designware_spi.c b/drivers/spi/designware_spi.c
index 89a8266052..0ebd2cf3cb 100644
--- a/drivers/spi/designware_spi.c
+++ b/drivers/spi/designware_spi.c
@@ -95,27 +95,26 @@ struct dw_spi_platdata {
};
struct dw_spi_priv {
- void __iomem *regs;
- unsigned int freq; /* Default frequency */
- unsigned int mode;
struct clk clk;
- unsigned long bus_clk_rate;
-
+ struct reset_ctl_bulk resets;
struct gpio_desc cs_gpio; /* External chip-select gpio */
- int bits_per_word;
- u8 cs; /* chip select pin */
- u8 tmode; /* TR/TO/RO/EEPROM */
- u8 type; /* SPI/SSP/MicroWire */
- int len;
+ void __iomem *regs;
+ unsigned long bus_clk_rate;
+ unsigned int freq; /* Default frequency */
+ unsigned int mode;
- u32 fifo_len; /* depth of the FIFO buffer */
- void *tx;
- void *tx_end;
+ const void *tx;
+ const void *tx_end;
void *rx;
void *rx_end;
+ u32 fifo_len; /* depth of the FIFO buffer */
- struct reset_ctl_bulk resets;
+ int bits_per_word;
+ int len;
+ u8 cs; /* chip select pin */
+ u8 tmode; /* TR/TO/RO/EEPROM */
+ u8 type; /* SPI/SSP/MicroWire */
};
static inline u32 dw_read(struct dw_spi_priv *priv, u32 offset)