diff options
| author | Daniil Stas <daniil.stas@posteo.net> | 2021-05-24 01:24:49 +0300 |
|---|---|---|
| committer | Patrice Chotard <patrice.chotard@foss.st.com> | 2021-06-18 09:39:45 +0300 |
| commit | 88f7ca03b4a2dca45c33ae360c99f6dbe3fe394d (patch) | |
| tree | 307c7eea8a5ae63a33fa61f9bb68375a83f127ff /drivers/spi | |
| parent | 95a34eb42ec1319afaf5e27012744570588e034b (diff) | |
| download | u-boot-88f7ca03b4a2dca45c33ae360c99f6dbe3fe394d.tar.xz | |
spi: stm32_qspi: Fix short data write operation
TCF flag only means that all data was sent to FIFO. To check if the
data was sent out of FIFO we should also wait for the BUSY flag to be
cleared. Otherwise there is a race condition which can lead to
inability to write short (one byte long) data.
Signed-off-by: Daniil Stas <daniil.stas@posteo.net>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Diffstat (limited to 'drivers/spi')
| -rw-r--r-- | drivers/spi/stm32_qspi.c | 29 |
1 files changed, 15 insertions, 14 deletions
diff --git a/drivers/spi/stm32_qspi.c b/drivers/spi/stm32_qspi.c index 4acc9047b9..8f4aabc3d1 100644 --- a/drivers/spi/stm32_qspi.c +++ b/drivers/spi/stm32_qspi.c @@ -148,23 +148,24 @@ static int _stm32_qspi_wait_cmd(struct stm32_qspi_priv *priv, const struct spi_mem_op *op) { u32 sr; - int ret; - - if (!op->data.nbytes) - return _stm32_qspi_wait_for_not_busy(priv); + int ret = 0; - ret = readl_poll_timeout(&priv->regs->sr, sr, - sr & STM32_QSPI_SR_TCF, - STM32_QSPI_CMD_TIMEOUT_US); - if (ret) { - log_err("cmd timeout (stat:%#x)\n", sr); - } else if (readl(&priv->regs->sr) & STM32_QSPI_SR_TEF) { - log_err("transfer error (stat:%#x)\n", sr); - ret = -EIO; + if (op->data.nbytes) { + ret = readl_poll_timeout(&priv->regs->sr, sr, + sr & STM32_QSPI_SR_TCF, + STM32_QSPI_CMD_TIMEOUT_US); + if (ret) { + log_err("cmd timeout (stat:%#x)\n", sr); + } else if (readl(&priv->regs->sr) & STM32_QSPI_SR_TEF) { + log_err("transfer error (stat:%#x)\n", sr); + ret = -EIO; + } + /* clear flags */ + writel(STM32_QSPI_FCR_CTCF | STM32_QSPI_FCR_CTEF, &priv->regs->fcr); } - /* clear flags */ - writel(STM32_QSPI_FCR_CTCF | STM32_QSPI_FCR_CTEF, &priv->regs->fcr); + if (!ret) + ret = _stm32_qspi_wait_for_not_busy(priv); return ret; } |