diff options
| author | Michal Simek <michal.simek@xilinx.com> | 2021-02-09 17:28:15 +0300 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2021-02-23 16:56:59 +0300 |
| commit | 9b7aac75365b68bae2e8f7cf074ba95638d31882 (patch) | |
| tree | 9d2ee4b001275fe6a2191ead6ec3913e033a783d /drivers/spi | |
| parent | 3aba25bc382beeb8a92b46d23fd1db47dfcb1121 (diff) | |
| download | u-boot-9b7aac75365b68bae2e8f7cf074ba95638d31882.tar.xz | |
clk: zynq: Add dummy clock enable function
A lot of Xilinx drivers are checking -ENOSYS which means that clock driver
doesn't have enable function. Remove this checking from drivers and create
dummy enable function as was done for clk_fixed_rate driver by
commit 6bf6d81c1112 ("clk: fixed_rate: add dummy enable() function").
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'drivers/spi')
| -rw-r--r-- | drivers/spi/zynq_qspi.c | 2 | ||||
| -rw-r--r-- | drivers/spi/zynq_spi.c | 2 | ||||
| -rw-r--r-- | drivers/spi/zynqmp_gqspi.c | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/drivers/spi/zynq_qspi.c b/drivers/spi/zynq_qspi.c index 845f2d2f5f..29dbbf5557 100644 --- a/drivers/spi/zynq_qspi.c +++ b/drivers/spi/zynq_qspi.c @@ -193,7 +193,7 @@ static int zynq_qspi_probe(struct udevice *bus) } ret = clk_enable(&clk); - if (ret && ret != -ENOSYS) { + if (ret) { dev_err(bus, "failed to enable clock\n"); return ret; } diff --git a/drivers/spi/zynq_spi.c b/drivers/spi/zynq_spi.c index 2971e55f41..650d4d71d9 100644 --- a/drivers/spi/zynq_spi.c +++ b/drivers/spi/zynq_spi.c @@ -143,7 +143,7 @@ static int zynq_spi_probe(struct udevice *bus) } ret = clk_enable(&clk); - if (ret && ret != -ENOSYS) { + if (ret) { dev_err(bus, "failed to enable clock\n"); return ret; } diff --git a/drivers/spi/zynqmp_gqspi.c b/drivers/spi/zynqmp_gqspi.c index c7db43a09a..bd25511aae 100644 --- a/drivers/spi/zynqmp_gqspi.c +++ b/drivers/spi/zynqmp_gqspi.c @@ -373,7 +373,7 @@ static int zynqmp_qspi_probe(struct udevice *bus) debug("%s: CLK %ld\n", __func__, clock); ret = clk_enable(&clk); - if (ret && ret != -ENOSYS) { + if (ret) { dev_err(bus, "failed to enable clock\n"); return ret; } |