diff options
author | Tom Rini <trini@konsulko.com> | 2021-03-31 16:47:30 +0300 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2021-03-31 16:47:30 +0300 |
commit | db8b46120aed6554d1ff405260ea6d2cc2439fcc (patch) | |
tree | 40326d1f241593e0593f7168eda5a09f19ce49ae /drivers/spi | |
parent | 7d23eb9260d5ce0ccb219a17cfc90c29101d4fa5 (diff) | |
parent | c5465684b9c74780fdeb30568c586d824eafd75c (diff) | |
download | u-boot-db8b46120aed6554d1ff405260ea6d2cc2439fcc.tar.xz |
Merge tag 'xilinx-for-v2021.07' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next
Xilinx changes for v2021.07
net:
- Fix gem PCS support
spi:
- Small trivial fixes
zynq:
- Enable time/timer commands
- Update bitmain platform
- Several DT changes
zynqmp:
- Update clock driver
- mini config alignments
- Add/update psu_init for zcu208/zcu216/zc1275
- Several DT changes
- Enable efi debug command (also for Versal)
Diffstat (limited to 'drivers/spi')
-rw-r--r-- | drivers/spi/xilinx_spi.c | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/drivers/spi/xilinx_spi.c b/drivers/spi/xilinx_spi.c index 0274afdc6e..b892cdae9b 100644 --- a/drivers/spi/xilinx_spi.c +++ b/drivers/spi/xilinx_spi.c @@ -314,8 +314,7 @@ static int xilinx_spi_set_speed(struct udevice *bus, uint speed) priv->freq = speed; - debug("xilinx_spi_set_speed: regs=%p, speed=%d\n", priv->regs, - priv->freq); + debug("%s: regs=%p, speed=%d\n", __func__, priv->regs, priv->freq); return 0; } @@ -324,7 +323,7 @@ static int xilinx_spi_set_mode(struct udevice *bus, uint mode) { struct xilinx_spi_priv *priv = dev_get_priv(bus); struct xilinx_spi_regs *regs = priv->regs; - uint32_t spicr; + u32 spicr; spicr = readl(®s->spicr); if (mode & SPI_LSB_FIRST) @@ -339,8 +338,7 @@ static int xilinx_spi_set_mode(struct udevice *bus, uint mode) writel(spicr, ®s->spicr); priv->mode = mode; - debug("xilinx_spi_set_mode: regs=%p, mode=%d\n", priv->regs, - priv->mode); + debug("%s: regs=%p, mode=%d\n", __func__, priv->regs, priv->mode); return 0; } |