diff options
| author | Weijie Gao <weijie.gao@mediatek.com> | 2020-04-21 10:28:29 +0300 |
|---|---|---|
| committer | Daniel Schwierzeck <daniel.schwierzeck@gmail.com> | 2020-04-27 21:29:33 +0300 |
| commit | caf709229419b3ae6f6748d5c575a44a1bf30c14 (patch) | |
| tree | 9495962d5cdb0f925fd9fd805a3b4bd4eefd73f4 /drivers/sysreset/Makefile | |
| parent | 2a9d68e41f6d67432c19dc1d140f908df0401f2c (diff) | |
| download | u-boot-caf709229419b3ae6f6748d5c575a44a1bf30c14.tar.xz | |
sysreset: add reset controller based reboot driver
Some chips provide their sysreset function in reset controller, which is
normally a bit written to 1 to perform the sysreset.
This patch adds a new sysreset driver to take advantage of it.
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Diffstat (limited to 'drivers/sysreset/Makefile')
| -rw-r--r-- | drivers/sysreset/Makefile | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile index 51af68fad3..3ed4bab9e3 100644 --- a/drivers/sysreset/Makefile +++ b/drivers/sysreset/Makefile @@ -16,5 +16,6 @@ obj-$(CONFIG_SYSRESET_SOCFPGA_S10) += sysreset_socfpga_s10.o obj-$(CONFIG_SYSRESET_TI_SCI) += sysreset-ti-sci.o obj-$(CONFIG_SYSRESET_SYSCON) += sysreset_syscon.o obj-$(CONFIG_SYSRESET_WATCHDOG) += sysreset_watchdog.o +obj-$(CONFIG_SYSRESET_RESETCTL) += sysreset_resetctl.o obj-$(CONFIG_$(SPL_TPL_)SYSRESET_X86) += sysreset_x86.o obj-$(CONFIG_TARGET_XTFPGA) += sysreset_xtfpga.o |