Merge tag 'xilinx-for-v2022.04-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx changes for v2022.04-rc1

gpio:
- Add modepin driver

net:
- Save random mac addresses to eth variable

zynqmp gem:
- Add support for mdio bus DT description
- Add support for reset and SGMII phy configuration
- Reduce timeout for MDIO accesses

zynqmp clk:
- Fix clock handling for gem and usb

phy:
- Add zynqmp phy/serdes driver

serial:
- Add one missing compatible string

microblaze:
- Symbol alignement
- SPL fixups
- Code cleanups

zynqmp:
- Various dt changes, DP pre-reloc, gem resets, gem clocks
- Switch SOM to shared psu configuration
- Move dcache handling to firmware driver
- Workaround gmii2rgmii DT description issue
- Enable broadcasts again
- Change firmware enablement logic
- Small adjustement in firmware driver

versal:
- Support new mmc@ DT nodes
- Fix run time variable handling
- Add missing I2C_PMC ID for power domain

1 files changed, 4 insertions, 2 deletions

diff --git a/drivers/sysreset/sysreset_microblaze.c b/drivers/sysreset/sysreset_microblaze.c
index 514c95817f..83a7f77ac4 100644
--- a/drivers/sysreset/sysreset_microblaze.c
+++ b/drivers/sysreset/sysreset_microblaze.c
@@ -8,13 +8,15 @@
 #include <errno.h>
 #include <sysreset.h>
 #include <linux/err.h>
+#include <linux/stringify.h>
 
 static int microblaze_sysreset_request(struct udevice *dev,
 				       enum sysreset_t type)
 {
 	puts("Microblaze soft reset sysreset\n");
-	__asm__ __volatile__ ("	mts rmsr, r0;" \
-				"bra r0");
+	__asm__ __volatile__ (
+	    "mts rmsr, r0;" \
+	    "brai " __stringify(CONFIG_XILINX_MICROBLAZE0_VECTOR_BASE_ADDR));
 
 	return -EINPROGRESS;
 }